WAFER PROCESSING APPARATUS AND WAFER PROCESSING METHOD
The invention for a substrate processing apparatus and a substrate processing method is disclosed. The substrate processing apparatus of the present invention includes: a first chamber part in which a first wafer part including a retainer ring part and a plurality of cut first dies is processed; a s...
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| creator | BAEK SEUNG DAE JUNGOO PARK KIM SUNG YUP |
| description | The invention for a substrate processing apparatus and a substrate processing method is disclosed. The substrate processing apparatus of the present invention includes: a first chamber part in which a first wafer part including a retainer ring part and a plurality of cut first dies is processed; a second chamber part in which a wafer part or a second wafer part including a carrier substrate is processed; and a third chamber part in which the first die of the first wafer part processed in the first chamber part and the second chamber part and the second wafer part are stacked and pre-bonded.
기판처리장치 및 기판처리방법에 대한 발명이 개시된다. 본 발명의 기판처리장치는: 리테이너링부와 절단된 복수의 제1다이를 포함하는 제1웨이퍼부가 처리되는 제1챔버부; 웨이퍼부 또는 캐리어 기판이 포함되는 제2웨이퍼부가 처리되는 제2챔버부; 및 제1챔버부와 제2챔버부에서 처리된 제1웨이퍼부의 제1다이와 제2웨이퍼부가 적층 및 프리 본딩되는 제3챔버부를 포함하는 것을 특징으로 한다. |
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기판처리장치 및 기판처리방법에 대한 발명이 개시된다. 본 발명의 기판처리장치는: 리테이너링부와 절단된 복수의 제1다이를 포함하는 제1웨이퍼부가 처리되는 제1챔버부; 웨이퍼부 또는 캐리어 기판이 포함되는 제2웨이퍼부가 처리되는 제2챔버부; 및 제1챔버부와 제2챔버부에서 처리된 제1웨이퍼부의 제1다이와 제2웨이퍼부가 적층 및 프리 본딩되는 제3챔버부를 포함하는 것을 특징으로 한다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; CLEANING ; CLEANING IN GENERAL ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PERFORMING OPERATIONS ; PREVENTION OF FOULING IN GENERAL ; SEMICONDUCTOR DEVICES ; TRANSPORTING</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221028&DB=EPODOC&CC=KR&NR=20220144991A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221028&DB=EPODOC&CC=KR&NR=20220144991A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BAEK SEUNG DAE</creatorcontrib><creatorcontrib>JUNGOO PARK</creatorcontrib><creatorcontrib>KIM SUNG YUP</creatorcontrib><title>WAFER PROCESSING APPARATUS AND WAFER PROCESSING METHOD</title><description>The invention for a substrate processing apparatus and a substrate processing method is disclosed. The substrate processing apparatus of the present invention includes: a first chamber part in which a first wafer part including a retainer ring part and a plurality of cut first dies is processed; a second chamber part in which a wafer part or a second wafer part including a carrier substrate is processed; and a third chamber part in which the first die of the first wafer part processed in the first chamber part and the second chamber part and the second wafer part are stacked and pre-bonded.
기판처리장치 및 기판처리방법에 대한 발명이 개시된다. 본 발명의 기판처리장치는: 리테이너링부와 절단된 복수의 제1다이를 포함하는 제1웨이퍼부가 처리되는 제1챔버부; 웨이퍼부 또는 캐리어 기판이 포함되는 제2웨이퍼부가 처리되는 제2챔버부; 및 제1챔버부와 제2챔버부에서 처리된 제1웨이퍼부의 제1다이와 제2웨이퍼부가 적층 및 프리 본딩되는 제3챔버부를 포함하는 것을 특징으로 한다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CLEANING</subject><subject>CLEANING IN GENERAL</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PERFORMING OPERATIONS</subject><subject>PREVENTION OF FOULING IN GENERAL</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDALd3RzDVIICPJ3dg0O9vRzV3AMCHAMcgwJDVZw9HNRwJD2dQ3x8HfhYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXx3kFGBkZGBoYmJpaWho7GxKkCAMBfKOY</recordid><startdate>20221028</startdate><enddate>20221028</enddate><creator>BAEK SEUNG DAE</creator><creator>JUNGOO PARK</creator><creator>KIM SUNG YUP</creator><scope>EVB</scope></search><sort><creationdate>20221028</creationdate><title>WAFER PROCESSING APPARATUS AND WAFER PROCESSING METHOD</title><author>BAEK SEUNG DAE ; JUNGOO PARK ; KIM SUNG YUP</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20220144991A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CLEANING</topic><topic>CLEANING IN GENERAL</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PERFORMING OPERATIONS</topic><topic>PREVENTION OF FOULING IN GENERAL</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>BAEK SEUNG DAE</creatorcontrib><creatorcontrib>JUNGOO PARK</creatorcontrib><creatorcontrib>KIM SUNG YUP</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BAEK SEUNG DAE</au><au>JUNGOO PARK</au><au>KIM SUNG YUP</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>WAFER PROCESSING APPARATUS AND WAFER PROCESSING METHOD</title><date>2022-10-28</date><risdate>2022</risdate><abstract>The invention for a substrate processing apparatus and a substrate processing method is disclosed. The substrate processing apparatus of the present invention includes: a first chamber part in which a first wafer part including a retainer ring part and a plurality of cut first dies is processed; a second chamber part in which a wafer part or a second wafer part including a carrier substrate is processed; and a third chamber part in which the first die of the first wafer part processed in the first chamber part and the second chamber part and the second wafer part are stacked and pre-bonded.
기판처리장치 및 기판처리방법에 대한 발명이 개시된다. 본 발명의 기판처리장치는: 리테이너링부와 절단된 복수의 제1다이를 포함하는 제1웨이퍼부가 처리되는 제1챔버부; 웨이퍼부 또는 캐리어 기판이 포함되는 제2웨이퍼부가 처리되는 제2챔버부; 및 제1챔버부와 제2챔버부에서 처리된 제1웨이퍼부의 제1다이와 제2웨이퍼부가 적층 및 프리 본딩되는 제3챔버부를 포함하는 것을 특징으로 한다.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CLEANING CLEANING IN GENERAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PERFORMING OPERATIONS PREVENTION OF FOULING IN GENERAL SEMICONDUCTOR DEVICES TRANSPORTING |
| title | WAFER PROCESSING APPARATUS AND WAFER PROCESSING METHOD |
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