PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE WITH THE SAME
According to various embodiments disclosed in the present document, a printed circuit board may include: a first wiring layer including at least one first signal line and at least one first dummy line; and a second wiring layer arranged on the first wiring layer and including at least one second sig...
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| creator | CHUNG CHEOLYOON PARK GYOUNGHWAN HONG EUNSEOK |
| description | According to various embodiments disclosed in the present document, a printed circuit board may include: a first wiring layer including at least one first signal line and at least one first dummy line; and a second wiring layer arranged on the first wiring layer and including at least one second signal line and at least one second dummy line, wherein when the printed circuit board is viewed from above, the at least one first signal line may be arranged to overlap, at least in part, the at least one second dummy line, and the at least one second signal line may be arranged to overlap, at least in part, the at least one first dummy line. In addition, various embodiments are possible. According to the present invention, it is possible to arrange more signal lines in the same area or the same number of signal lines in a narrower area.
본 문서에 개시된 다양한 실시예에 따르면, 인쇄회로 기판은, 적어도 하나의 제1 신호 라인과 적어도 하나의 제1 더미 라인을 포함하는 제1 배선층 및 상기 제1 배선층 위에 배치되고, 적어도 하나의 제2 신호 라인과 적어도 하나의 제2 더미 라인을 포함하는 제2 배선층을 포함하고, 상기 인쇄회로 기판의 위에서 바라볼 때, 상기 적어도 하나의 제1 신호 라인은 상기 적어도 하나의 제2 더미 라인과 적어도 일부 중첩되게 배치되고, 상기 적어도 하나의 제2 신호 라인은 상기 적어도 하나의 제1 더미 라인과 적어도 일부 중첩되게 배치될 수 있다. 이외에도 다양한 실시예가 가능하다. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20210026209A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20210026209A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20210026209A3</originalsourceid><addsrcrecordid>eNrjZLAMCPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUXD1cXUOCfL383RWcHEN83R2VQj3DPFQCPFwVQh29HXlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXx3kFGBkaGBgZGZkYGlo7GxKkCAAQfKSs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE WITH THE SAME</title><source>esp@cenet</source><creator>CHUNG CHEOLYOON ; PARK GYOUNGHWAN ; HONG EUNSEOK</creator><creatorcontrib>CHUNG CHEOLYOON ; PARK GYOUNGHWAN ; HONG EUNSEOK</creatorcontrib><description>According to various embodiments disclosed in the present document, a printed circuit board may include: a first wiring layer including at least one first signal line and at least one first dummy line; and a second wiring layer arranged on the first wiring layer and including at least one second signal line and at least one second dummy line, wherein when the printed circuit board is viewed from above, the at least one first signal line may be arranged to overlap, at least in part, the at least one second dummy line, and the at least one second signal line may be arranged to overlap, at least in part, the at least one first dummy line. In addition, various embodiments are possible. According to the present invention, it is possible to arrange more signal lines in the same area or the same number of signal lines in a narrower area.
본 문서에 개시된 다양한 실시예에 따르면, 인쇄회로 기판은, 적어도 하나의 제1 신호 라인과 적어도 하나의 제1 더미 라인을 포함하는 제1 배선층 및 상기 제1 배선층 위에 배치되고, 적어도 하나의 제2 신호 라인과 적어도 하나의 제2 더미 라인을 포함하는 제2 배선층을 포함하고, 상기 인쇄회로 기판의 위에서 바라볼 때, 상기 적어도 하나의 제1 신호 라인은 상기 적어도 하나의 제2 더미 라인과 적어도 일부 중첩되게 배치되고, 상기 적어도 하나의 제2 신호 라인은 상기 적어도 하나의 제1 더미 라인과 적어도 일부 중첩되게 배치될 수 있다. 이외에도 다양한 실시예가 가능하다.</description><language>eng ; kor</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210310&DB=EPODOC&CC=KR&NR=20210026209A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210310&DB=EPODOC&CC=KR&NR=20210026209A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHUNG CHEOLYOON</creatorcontrib><creatorcontrib>PARK GYOUNGHWAN</creatorcontrib><creatorcontrib>HONG EUNSEOK</creatorcontrib><title>PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE WITH THE SAME</title><description>According to various embodiments disclosed in the present document, a printed circuit board may include: a first wiring layer including at least one first signal line and at least one first dummy line; and a second wiring layer arranged on the first wiring layer and including at least one second signal line and at least one second dummy line, wherein when the printed circuit board is viewed from above, the at least one first signal line may be arranged to overlap, at least in part, the at least one second dummy line, and the at least one second signal line may be arranged to overlap, at least in part, the at least one first dummy line. In addition, various embodiments are possible. According to the present invention, it is possible to arrange more signal lines in the same area or the same number of signal lines in a narrower area.
본 문서에 개시된 다양한 실시예에 따르면, 인쇄회로 기판은, 적어도 하나의 제1 신호 라인과 적어도 하나의 제1 더미 라인을 포함하는 제1 배선층 및 상기 제1 배선층 위에 배치되고, 적어도 하나의 제2 신호 라인과 적어도 하나의 제2 더미 라인을 포함하는 제2 배선층을 포함하고, 상기 인쇄회로 기판의 위에서 바라볼 때, 상기 적어도 하나의 제1 신호 라인은 상기 적어도 하나의 제2 더미 라인과 적어도 일부 중첩되게 배치되고, 상기 적어도 하나의 제2 신호 라인은 상기 적어도 하나의 제1 더미 라인과 적어도 일부 중첩되게 배치될 수 있다. 이외에도 다양한 실시예가 가능하다.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMCPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUXD1cXUOCfL383RWcHEN83R2VQj3DPFQCPFwVQh29HXlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXx3kFGBkaGBgZGZkYGlo7GxKkCAAQfKSs</recordid><startdate>20210310</startdate><enddate>20210310</enddate><creator>CHUNG CHEOLYOON</creator><creator>PARK GYOUNGHWAN</creator><creator>HONG EUNSEOK</creator><scope>EVB</scope></search><sort><creationdate>20210310</creationdate><title>PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE WITH THE SAME</title><author>CHUNG CHEOLYOON ; PARK GYOUNGHWAN ; HONG EUNSEOK</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20210026209A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2021</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHUNG CHEOLYOON</creatorcontrib><creatorcontrib>PARK GYOUNGHWAN</creatorcontrib><creatorcontrib>HONG EUNSEOK</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHUNG CHEOLYOON</au><au>PARK GYOUNGHWAN</au><au>HONG EUNSEOK</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE WITH THE SAME</title><date>2021-03-10</date><risdate>2021</risdate><abstract>According to various embodiments disclosed in the present document, a printed circuit board may include: a first wiring layer including at least one first signal line and at least one first dummy line; and a second wiring layer arranged on the first wiring layer and including at least one second signal line and at least one second dummy line, wherein when the printed circuit board is viewed from above, the at least one first signal line may be arranged to overlap, at least in part, the at least one second dummy line, and the at least one second signal line may be arranged to overlap, at least in part, the at least one first dummy line. In addition, various embodiments are possible. According to the present invention, it is possible to arrange more signal lines in the same area or the same number of signal lines in a narrower area.
본 문서에 개시된 다양한 실시예에 따르면, 인쇄회로 기판은, 적어도 하나의 제1 신호 라인과 적어도 하나의 제1 더미 라인을 포함하는 제1 배선층 및 상기 제1 배선층 위에 배치되고, 적어도 하나의 제2 신호 라인과 적어도 하나의 제2 더미 라인을 포함하는 제2 배선층을 포함하고, 상기 인쇄회로 기판의 위에서 바라볼 때, 상기 적어도 하나의 제1 신호 라인은 상기 적어도 하나의 제2 더미 라인과 적어도 일부 중첩되게 배치되고, 상기 적어도 하나의 제2 신호 라인은 상기 적어도 하나의 제1 더미 라인과 적어도 일부 중첩되게 배치될 수 있다. 이외에도 다양한 실시예가 가능하다.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE WITH THE SAME |
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