PRINTED CIRCUIT BOARD WITH EMBEDDED INTERCONNECT STRUCTURE

The present invention relates to an interconnect structure and comprises an interconnect structure and a printed circuit board. The present invention relates to a printed circuit board with an embedded interconnect structure which comprises: an interconnect structure including a circuit member havin...

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Hauptverfasser: LEE DOO HWAN, KIM YONG HOON, CHO TAE JE, LEE JIN WON
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Sprache:eng ; kor
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creator LEE DOO HWAN
KIM YONG HOON
CHO TAE JE
LEE JIN WON
description The present invention relates to an interconnect structure and comprises an interconnect structure and a printed circuit board. The present invention relates to a printed circuit board with an embedded interconnect structure which comprises: an interconnect structure including a circuit member having a plurality of circuit layers and a passive element arranged in parallel with the circuit member and having an external electrode. The printed circuit board comprises: an insulating layer covering the interconnect structure; a first wiring layer arranged on the insulating layer; a first wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the uppermost circuit layer among the circuit layers; and a second wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the external electrode of the passive element. The top surface of the uppermost circuit layer contacting the first wiring via is coplanar with the top surface of the external electrode contacting the second wire via. 본 개시는 복수의 회로층을 포함하는 회로부재, 및 상기 회로부재와 나란하게 배치되며 외부전극을 갖는 수동소자, 를 포함하는 연결구조체; 및 상기 연결구조체를 덮는 절연층, 상기 절연층 상에 배치된 제1배선층, 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 복수의 회로층 중 최상측 회로층과 전기적으로 연결하는 제1배선비아, 및 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 수동소자의 외부전극과 전기적으로 연결하는 제2배선비아, 를 포함하는 인쇄회로기판; 을 포함하며, 상기 최상측 회로층의 상기 제1배선비아와 접하는 상면은 상기 외부전극의 상기 제2배선비아와 접하는 상면과 코플래너(Coplanar)한, 연결구조체 내장기판에 관한 것이다.
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The present invention relates to a printed circuit board with an embedded interconnect structure which comprises: an interconnect structure including a circuit member having a plurality of circuit layers and a passive element arranged in parallel with the circuit member and having an external electrode. The printed circuit board comprises: an insulating layer covering the interconnect structure; a first wiring layer arranged on the insulating layer; a first wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the uppermost circuit layer among the circuit layers; and a second wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the external electrode of the passive element. The top surface of the uppermost circuit layer contacting the first wiring via is coplanar with the top surface of the external electrode contacting the second wire via. 본 개시는 복수의 회로층을 포함하는 회로부재, 및 상기 회로부재와 나란하게 배치되며 외부전극을 갖는 수동소자, 를 포함하는 연결구조체; 및 상기 연결구조체를 덮는 절연층, 상기 절연층 상에 배치된 제1배선층, 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 복수의 회로층 중 최상측 회로층과 전기적으로 연결하는 제1배선비아, 및 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 수동소자의 외부전극과 전기적으로 연결하는 제2배선비아, 를 포함하는 인쇄회로기판; 을 포함하며, 상기 최상측 회로층의 상기 제1배선비아와 접하는 상면은 상기 외부전극의 상기 제2배선비아와 접하는 상면과 코플래너(Coplanar)한, 연결구조체 내장기판에 관한 것이다.</description><language>eng ; kor</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200317&amp;DB=EPODOC&amp;CC=KR&amp;NR=20200028602A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200317&amp;DB=EPODOC&amp;CC=KR&amp;NR=20200028602A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE DOO HWAN</creatorcontrib><creatorcontrib>KIM YONG HOON</creatorcontrib><creatorcontrib>CHO TAE JE</creatorcontrib><creatorcontrib>LEE JIN WON</creatorcontrib><title>PRINTED CIRCUIT BOARD WITH EMBEDDED INTERCONNECT STRUCTURE</title><description>The present invention relates to an interconnect structure and comprises an interconnect structure and a printed circuit board. The present invention relates to a printed circuit board with an embedded interconnect structure which comprises: an interconnect structure including a circuit member having a plurality of circuit layers and a passive element arranged in parallel with the circuit member and having an external electrode. The printed circuit board comprises: an insulating layer covering the interconnect structure; a first wiring layer arranged on the insulating layer; a first wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the uppermost circuit layer among the circuit layers; and a second wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the external electrode of the passive element. The top surface of the uppermost circuit layer contacting the first wiring via is coplanar with the top surface of the external electrode contacting the second wire via. 본 개시는 복수의 회로층을 포함하는 회로부재, 및 상기 회로부재와 나란하게 배치되며 외부전극을 갖는 수동소자, 를 포함하는 연결구조체; 및 상기 연결구조체를 덮는 절연층, 상기 절연층 상에 배치된 제1배선층, 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 복수의 회로층 중 최상측 회로층과 전기적으로 연결하는 제1배선비아, 및 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 수동소자의 외부전극과 전기적으로 연결하는 제2배선비아, 를 포함하는 인쇄회로기판; 을 포함하며, 상기 최상측 회로층의 상기 제1배선비아와 접하는 상면은 상기 외부전극의 상기 제2배선비아와 접하는 상면과 코플래너(Coplanar)한, 연결구조체 내장기판에 관한 것이다.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKCPL0C3F1UXD2DHIO9QxRcPJ3DHJRCPcM8VBw9XVydXEByoFUBDn7-_m5OocoBIcEhTqHhAa58jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gIwMjAwMDIwszAyNHY-JUAQBmaSn9</recordid><startdate>20200317</startdate><enddate>20200317</enddate><creator>LEE DOO HWAN</creator><creator>KIM YONG HOON</creator><creator>CHO TAE JE</creator><creator>LEE JIN WON</creator><scope>EVB</scope></search><sort><creationdate>20200317</creationdate><title>PRINTED CIRCUIT BOARD WITH EMBEDDED INTERCONNECT STRUCTURE</title><author>LEE DOO HWAN ; KIM YONG HOON ; CHO TAE JE ; LEE JIN WON</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20200028602A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2020</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE DOO HWAN</creatorcontrib><creatorcontrib>KIM YONG HOON</creatorcontrib><creatorcontrib>CHO TAE JE</creatorcontrib><creatorcontrib>LEE JIN WON</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE DOO HWAN</au><au>KIM YONG HOON</au><au>CHO TAE JE</au><au>LEE JIN WON</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD WITH EMBEDDED INTERCONNECT STRUCTURE</title><date>2020-03-17</date><risdate>2020</risdate><abstract>The present invention relates to an interconnect structure and comprises an interconnect structure and a printed circuit board. The present invention relates to a printed circuit board with an embedded interconnect structure which comprises: an interconnect structure including a circuit member having a plurality of circuit layers and a passive element arranged in parallel with the circuit member and having an external electrode. The printed circuit board comprises: an insulating layer covering the interconnect structure; a first wiring layer arranged on the insulating layer; a first wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the uppermost circuit layer among the circuit layers; and a second wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the external electrode of the passive element. The top surface of the uppermost circuit layer contacting the first wiring via is coplanar with the top surface of the external electrode contacting the second wire via. 본 개시는 복수의 회로층을 포함하는 회로부재, 및 상기 회로부재와 나란하게 배치되며 외부전극을 갖는 수동소자, 를 포함하는 연결구조체; 및 상기 연결구조체를 덮는 절연층, 상기 절연층 상에 배치된 제1배선층, 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 복수의 회로층 중 최상측 회로층과 전기적으로 연결하는 제1배선비아, 및 상기 절연층의 적어도 일부를 관통하며 상기 제1배선층을 상기 수동소자의 외부전극과 전기적으로 연결하는 제2배선비아, 를 포함하는 인쇄회로기판; 을 포함하며, 상기 최상측 회로층의 상기 제1배선비아와 접하는 상면은 상기 외부전극의 상기 제2배선비아와 접하는 상면과 코플래너(Coplanar)한, 연결구조체 내장기판에 관한 것이다.</abstract><oa>free_for_read</oa></addata></record>
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subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title PRINTED CIRCUIT BOARD WITH EMBEDDED INTERCONNECT STRUCTURE
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