METHOD FOR GROWING -ARSENIC-BASED EPITAXIAL LAYER ON -PHOSPHORUS-BASED SUBSTRATE
According to an embodiment of the present invention, a method for growing a semiconductor substrate comprises the steps of: forming a III-phosphorus-based buffer layer on a III-phosphorus-based substrate; forming a III-arsenic-based intermediate layer on the III-phosphorus-based buffer layer; formin...
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| creator | YANG HYUNDUK SONG JIN DONG HAN IL KI KANG JOONHYUN |
| description | According to an embodiment of the present invention, a method for growing a semiconductor substrate comprises the steps of: forming a III-phosphorus-based buffer layer on a III-phosphorus-based substrate; forming a III-arsenic-based intermediate layer on the III-phosphorus-based buffer layer; forming a III-phosphorus-based epitaxial layer on the III-arsenic-based intermediate layer; patterning the III-phosphorus-based epitaxial layer; and selectively etching the III-arsenic-based intermediate layer. According to the present invention, an ultra-thin III-arsenic intermediate layer which does not affect characteristics such as a lattice constant and a thermal expansion coefficient is formed between the III-arsenic-based epitaxial layer and the III-phosphorus-based substrate, thereby preventing phosphorus from being separated from a surface of the III-phosphorus-based substrate or the buffer layer, and significantly reducing crystal defects generated in an existing thick amorphous or polycrystalline ultra-thin film buffer layer. Accordingly, the manufactured semiconductor device has excellent interface characteristics and thermal conductivity characteristics. Also, atoms are not separated from the III-phosphorus-based substrate and the buffer layer and uniformly remain after the epitaxial layer is separated, such that a manufacturing process can be repeated using the same as a template, thereby greatly reducing the overall cost and improving economic feasibility.
본 발명의 실시예에 따른 반도체 기판의 성장 방법은, Ⅲ-인화계 기판 상에 Ⅲ-인화계 완충층을 형성하는 단계; 상기 Ⅲ-인화계 완충층 상에 Ⅲ-비화계 중간층을 형성하는 단계; 상기 Ⅲ-비화계 중간층 상에 Ⅲ-비화계 에피층을 형성하는 단계; 상기 Ⅲ-비화계 에피층을 패터닝하는 단계; 및 상기 Ⅲ-비화계 중간층을 선택적으로 식각하는 단계를 포함한다. 이에 의하면, Ⅲ-비화계 에피층과 Ⅲ-인화계 기판 사이에 격자상수와 열팽창 계수등의 특성에 영향을 주지 않는 초박막 Ⅲ-비화계 중간층을 형성함으로써, Ⅲ-인화계 기판이나 완충층의 표면으로부터 인화물 이탈을 방지하고, 종래의 두꺼운 비정질 혹은 다결정질 초박막 완충층에서 발생하는 결정결함을 크게 줄일 수 있다. 이에 따라 제조된 반도체 소자는 매우 우수한 계면 특성 및 열전도 특성을 가지게 된다. 또한, Ⅲ-인화계 기판 및 완충층으로부터 원자가 이탈하지 않아 에피층을 분리한 이후에도 균일한 상태로 남아있게 되므로, 이를 템플릿으로 이용하여 제조공정을 반복할 수 있어 전체적인 비용이 크게 감소하고 경제성이 향상될 수 있다. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20190140690A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20190140690A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20190140690A3</originalsourceid><addsrcrecordid>eNrjZAjwdQ3x8HdRcPMPUnAP8g_39HNX0HUMCnb183TWdXIMdnVRcA3wDHGM8HT0UfBxjHQNUvD3U9AN8PAPBuKg0GCoouBQp-CQIMcQVx4G1rTEnOJUXijNzaDs5hri7KGbWpAfn1pckJicmpdaEu8dZGRgaGlgaGJgZmngaEycKgAimS_i</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD FOR GROWING -ARSENIC-BASED EPITAXIAL LAYER ON -PHOSPHORUS-BASED SUBSTRATE</title><source>esp@cenet</source><creator>YANG HYUNDUK ; SONG JIN DONG ; HAN IL KI ; KANG JOONHYUN</creator><creatorcontrib>YANG HYUNDUK ; SONG JIN DONG ; HAN IL KI ; KANG JOONHYUN</creatorcontrib><description>According to an embodiment of the present invention, a method for growing a semiconductor substrate comprises the steps of: forming a III-phosphorus-based buffer layer on a III-phosphorus-based substrate; forming a III-arsenic-based intermediate layer on the III-phosphorus-based buffer layer; forming a III-phosphorus-based epitaxial layer on the III-arsenic-based intermediate layer; patterning the III-phosphorus-based epitaxial layer; and selectively etching the III-arsenic-based intermediate layer. According to the present invention, an ultra-thin III-arsenic intermediate layer which does not affect characteristics such as a lattice constant and a thermal expansion coefficient is formed between the III-arsenic-based epitaxial layer and the III-phosphorus-based substrate, thereby preventing phosphorus from being separated from a surface of the III-phosphorus-based substrate or the buffer layer, and significantly reducing crystal defects generated in an existing thick amorphous or polycrystalline ultra-thin film buffer layer. Accordingly, the manufactured semiconductor device has excellent interface characteristics and thermal conductivity characteristics. Also, atoms are not separated from the III-phosphorus-based substrate and the buffer layer and uniformly remain after the epitaxial layer is separated, such that a manufacturing process can be repeated using the same as a template, thereby greatly reducing the overall cost and improving economic feasibility.
본 발명의 실시예에 따른 반도체 기판의 성장 방법은, Ⅲ-인화계 기판 상에 Ⅲ-인화계 완충층을 형성하는 단계; 상기 Ⅲ-인화계 완충층 상에 Ⅲ-비화계 중간층을 형성하는 단계; 상기 Ⅲ-비화계 중간층 상에 Ⅲ-비화계 에피층을 형성하는 단계; 상기 Ⅲ-비화계 에피층을 패터닝하는 단계; 및 상기 Ⅲ-비화계 중간층을 선택적으로 식각하는 단계를 포함한다. 이에 의하면, Ⅲ-비화계 에피층과 Ⅲ-인화계 기판 사이에 격자상수와 열팽창 계수등의 특성에 영향을 주지 않는 초박막 Ⅲ-비화계 중간층을 형성함으로써, Ⅲ-인화계 기판이나 완충층의 표면으로부터 인화물 이탈을 방지하고, 종래의 두꺼운 비정질 혹은 다결정질 초박막 완충층에서 발생하는 결정결함을 크게 줄일 수 있다. 이에 따라 제조된 반도체 소자는 매우 우수한 계면 특성 및 열전도 특성을 가지게 된다. 또한, Ⅲ-인화계 기판 및 완충층으로부터 원자가 이탈하지 않아 에피층을 분리한 이후에도 균일한 상태로 남아있게 되므로, 이를 템플릿으로 이용하여 제조공정을 반복할 수 있어 전체적인 비용이 크게 감소하고 경제성이 향상될 수 있다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191220&DB=EPODOC&CC=KR&NR=20190140690A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191220&DB=EPODOC&CC=KR&NR=20190140690A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YANG HYUNDUK</creatorcontrib><creatorcontrib>SONG JIN DONG</creatorcontrib><creatorcontrib>HAN IL KI</creatorcontrib><creatorcontrib>KANG JOONHYUN</creatorcontrib><title>METHOD FOR GROWING -ARSENIC-BASED EPITAXIAL LAYER ON -PHOSPHORUS-BASED SUBSTRATE</title><description>According to an embodiment of the present invention, a method for growing a semiconductor substrate comprises the steps of: forming a III-phosphorus-based buffer layer on a III-phosphorus-based substrate; forming a III-arsenic-based intermediate layer on the III-phosphorus-based buffer layer; forming a III-phosphorus-based epitaxial layer on the III-arsenic-based intermediate layer; patterning the III-phosphorus-based epitaxial layer; and selectively etching the III-arsenic-based intermediate layer. According to the present invention, an ultra-thin III-arsenic intermediate layer which does not affect characteristics such as a lattice constant and a thermal expansion coefficient is formed between the III-arsenic-based epitaxial layer and the III-phosphorus-based substrate, thereby preventing phosphorus from being separated from a surface of the III-phosphorus-based substrate or the buffer layer, and significantly reducing crystal defects generated in an existing thick amorphous or polycrystalline ultra-thin film buffer layer. Accordingly, the manufactured semiconductor device has excellent interface characteristics and thermal conductivity characteristics. Also, atoms are not separated from the III-phosphorus-based substrate and the buffer layer and uniformly remain after the epitaxial layer is separated, such that a manufacturing process can be repeated using the same as a template, thereby greatly reducing the overall cost and improving economic feasibility.
본 발명의 실시예에 따른 반도체 기판의 성장 방법은, Ⅲ-인화계 기판 상에 Ⅲ-인화계 완충층을 형성하는 단계; 상기 Ⅲ-인화계 완충층 상에 Ⅲ-비화계 중간층을 형성하는 단계; 상기 Ⅲ-비화계 중간층 상에 Ⅲ-비화계 에피층을 형성하는 단계; 상기 Ⅲ-비화계 에피층을 패터닝하는 단계; 및 상기 Ⅲ-비화계 중간층을 선택적으로 식각하는 단계를 포함한다. 이에 의하면, Ⅲ-비화계 에피층과 Ⅲ-인화계 기판 사이에 격자상수와 열팽창 계수등의 특성에 영향을 주지 않는 초박막 Ⅲ-비화계 중간층을 형성함으로써, Ⅲ-인화계 기판이나 완충층의 표면으로부터 인화물 이탈을 방지하고, 종래의 두꺼운 비정질 혹은 다결정질 초박막 완충층에서 발생하는 결정결함을 크게 줄일 수 있다. 이에 따라 제조된 반도체 소자는 매우 우수한 계면 특성 및 열전도 특성을 가지게 된다. 또한, Ⅲ-인화계 기판 및 완충층으로부터 원자가 이탈하지 않아 에피층을 분리한 이후에도 균일한 상태로 남아있게 되므로, 이를 템플릿으로 이용하여 제조공정을 반복할 수 있어 전체적인 비용이 크게 감소하고 경제성이 향상될 수 있다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAjwdQ3x8HdRcPMPUnAP8g_39HNX0HUMCnb183TWdXIMdnVRcA3wDHGM8HT0UfBxjHQNUvD3U9AN8PAPBuKg0GCoouBQp-CQIMcQVx4G1rTEnOJUXijNzaDs5hri7KGbWpAfn1pckJicmpdaEu8dZGRgaGlgaGJgZmngaEycKgAimS_i</recordid><startdate>20191220</startdate><enddate>20191220</enddate><creator>YANG HYUNDUK</creator><creator>SONG JIN DONG</creator><creator>HAN IL KI</creator><creator>KANG JOONHYUN</creator><scope>EVB</scope></search><sort><creationdate>20191220</creationdate><title>METHOD FOR GROWING -ARSENIC-BASED EPITAXIAL LAYER ON -PHOSPHORUS-BASED SUBSTRATE</title><author>YANG HYUNDUK ; SONG JIN DONG ; HAN IL KI ; KANG JOONHYUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20190140690A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YANG HYUNDUK</creatorcontrib><creatorcontrib>SONG JIN DONG</creatorcontrib><creatorcontrib>HAN IL KI</creatorcontrib><creatorcontrib>KANG JOONHYUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YANG HYUNDUK</au><au>SONG JIN DONG</au><au>HAN IL KI</au><au>KANG JOONHYUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR GROWING -ARSENIC-BASED EPITAXIAL LAYER ON -PHOSPHORUS-BASED SUBSTRATE</title><date>2019-12-20</date><risdate>2019</risdate><abstract>According to an embodiment of the present invention, a method for growing a semiconductor substrate comprises the steps of: forming a III-phosphorus-based buffer layer on a III-phosphorus-based substrate; forming a III-arsenic-based intermediate layer on the III-phosphorus-based buffer layer; forming a III-phosphorus-based epitaxial layer on the III-arsenic-based intermediate layer; patterning the III-phosphorus-based epitaxial layer; and selectively etching the III-arsenic-based intermediate layer. According to the present invention, an ultra-thin III-arsenic intermediate layer which does not affect characteristics such as a lattice constant and a thermal expansion coefficient is formed between the III-arsenic-based epitaxial layer and the III-phosphorus-based substrate, thereby preventing phosphorus from being separated from a surface of the III-phosphorus-based substrate or the buffer layer, and significantly reducing crystal defects generated in an existing thick amorphous or polycrystalline ultra-thin film buffer layer. Accordingly, the manufactured semiconductor device has excellent interface characteristics and thermal conductivity characteristics. Also, atoms are not separated from the III-phosphorus-based substrate and the buffer layer and uniformly remain after the epitaxial layer is separated, such that a manufacturing process can be repeated using the same as a template, thereby greatly reducing the overall cost and improving economic feasibility.
본 발명의 실시예에 따른 반도체 기판의 성장 방법은, Ⅲ-인화계 기판 상에 Ⅲ-인화계 완충층을 형성하는 단계; 상기 Ⅲ-인화계 완충층 상에 Ⅲ-비화계 중간층을 형성하는 단계; 상기 Ⅲ-비화계 중간층 상에 Ⅲ-비화계 에피층을 형성하는 단계; 상기 Ⅲ-비화계 에피층을 패터닝하는 단계; 및 상기 Ⅲ-비화계 중간층을 선택적으로 식각하는 단계를 포함한다. 이에 의하면, Ⅲ-비화계 에피층과 Ⅲ-인화계 기판 사이에 격자상수와 열팽창 계수등의 특성에 영향을 주지 않는 초박막 Ⅲ-비화계 중간층을 형성함으로써, Ⅲ-인화계 기판이나 완충층의 표면으로부터 인화물 이탈을 방지하고, 종래의 두꺼운 비정질 혹은 다결정질 초박막 완충층에서 발생하는 결정결함을 크게 줄일 수 있다. 이에 따라 제조된 반도체 소자는 매우 우수한 계면 특성 및 열전도 특성을 가지게 된다. 또한, Ⅲ-인화계 기판 및 완충층으로부터 원자가 이탈하지 않아 에피층을 분리한 이후에도 균일한 상태로 남아있게 되므로, 이를 템플릿으로 이용하여 제조공정을 반복할 수 있어 전체적인 비용이 크게 감소하고 경제성이 향상될 수 있다.</abstract><oa>free_for_read</oa></addata></record> |
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| title | METHOD FOR GROWING -ARSENIC-BASED EPITAXIAL LAYER ON -PHOSPHORUS-BASED SUBSTRATE |
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