SEMICONDUCTOR DEVICE INCLUDING CONTROL SWITCHES TO REDUCE PIN CAPACITANCE
Disclosed, in the present invention, is a semiconductor device which enables a semiconductor die in a stack of semiconductor dies to transmit or receive signals, and includes a control switch electrically insulating remaining dies in the stack of dies. By electrically insulating a non-enabled semico...
Gespeichert in:
| Hauptverfasser: | , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng ; kor |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | BAI YANWEN CHIU CHIN TIEN LIU YANGMING BAI YE ZHANG YAZHOU LIAO CHIH CHIN MA SHINENG |
| description | Disclosed, in the present invention, is a semiconductor device which enables a semiconductor die in a stack of semiconductor dies to transmit or receive signals, and includes a control switch electrically insulating remaining dies in the stack of dies. By electrically insulating a non-enabled semiconductor die among the stack of dies, a parasitic pin capacitance can be reduced or prevented.
본 발명은 반도체 다이의 스택 중의 반도체 다이를 인에이블링하여 신호를 송신하거나 수신하고, 아울러 다이 스택 중의 나머지의 다이를 전기적으로 절연시키는 제어 스위치를 포함하는 반도체 장치를 개시한다. 다이 스택 중의 인에이블링되지 않은 반도체 다이를 전기적으로 절연시켜, 기생 핀 커패시턴스를 감소시키거나 방지한다. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20190002278A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20190002278A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20190002278A3</originalsourceid><addsrcrecordid>eNrjZPAMdvX1dPb3cwl1DvEPUnBxDfN0dlXw9HP2CXXx9HNXAEqFBPn7KASHe4Y4e7gGK4T4KwS5AlW7KgR4-ik4OwY4OnuGOPo5u_IwsKYl5hSn8kJpbgZlN1egHt3Ugvz41OKCxOTUvNSSeO8gIwNDSwMDAyMjcwtHY-JUAQD6tS4P</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE INCLUDING CONTROL SWITCHES TO REDUCE PIN CAPACITANCE</title><source>esp@cenet</source><creator>BAI YANWEN ; CHIU CHIN TIEN ; LIU YANGMING ; BAI YE ; ZHANG YAZHOU ; LIAO CHIH CHIN ; MA SHINENG</creator><creatorcontrib>BAI YANWEN ; CHIU CHIN TIEN ; LIU YANGMING ; BAI YE ; ZHANG YAZHOU ; LIAO CHIH CHIN ; MA SHINENG</creatorcontrib><description>Disclosed, in the present invention, is a semiconductor device which enables a semiconductor die in a stack of semiconductor dies to transmit or receive signals, and includes a control switch electrically insulating remaining dies in the stack of dies. By electrically insulating a non-enabled semiconductor die among the stack of dies, a parasitic pin capacitance can be reduced or prevented.
본 발명은 반도체 다이의 스택 중의 반도체 다이를 인에이블링하여 신호를 송신하거나 수신하고, 아울러 다이 스택 중의 나머지의 다이를 전기적으로 절연시키는 제어 스위치를 포함하는 반도체 장치를 개시한다. 다이 스택 중의 인에이블링되지 않은 반도체 다이를 전기적으로 절연시켜, 기생 핀 커패시턴스를 감소시키거나 방지한다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES ; MICROSTRUCTURAL TECHNOLOGY ; PERFORMING OPERATIONS ; SEMICONDUCTOR DEVICES ; TRANSPORTING</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190108&DB=EPODOC&CC=KR&NR=20190002278A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190108&DB=EPODOC&CC=KR&NR=20190002278A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BAI YANWEN</creatorcontrib><creatorcontrib>CHIU CHIN TIEN</creatorcontrib><creatorcontrib>LIU YANGMING</creatorcontrib><creatorcontrib>BAI YE</creatorcontrib><creatorcontrib>ZHANG YAZHOU</creatorcontrib><creatorcontrib>LIAO CHIH CHIN</creatorcontrib><creatorcontrib>MA SHINENG</creatorcontrib><title>SEMICONDUCTOR DEVICE INCLUDING CONTROL SWITCHES TO REDUCE PIN CAPACITANCE</title><description>Disclosed, in the present invention, is a semiconductor device which enables a semiconductor die in a stack of semiconductor dies to transmit or receive signals, and includes a control switch electrically insulating remaining dies in the stack of dies. By electrically insulating a non-enabled semiconductor die among the stack of dies, a parasitic pin capacitance can be reduced or prevented.
본 발명은 반도체 다이의 스택 중의 반도체 다이를 인에이블링하여 신호를 송신하거나 수신하고, 아울러 다이 스택 중의 나머지의 다이를 전기적으로 절연시키는 제어 스위치를 포함하는 반도체 장치를 개시한다. 다이 스택 중의 인에이블링되지 않은 반도체 다이를 전기적으로 절연시켜, 기생 핀 커패시턴스를 감소시키거나 방지한다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES</subject><subject>MICROSTRUCTURAL TECHNOLOGY</subject><subject>PERFORMING OPERATIONS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAMdvX1dPb3cwl1DvEPUnBxDfN0dlXw9HP2CXXx9HNXAEqFBPn7KASHe4Y4e7gGK4T4KwS5AlW7KgR4-ik4OwY4OnuGOPo5u_IwsKYl5hSn8kJpbgZlN1egHt3Ugvz41OKCxOTUvNSSeO8gIwNDSwMDAyMjcwtHY-JUAQD6tS4P</recordid><startdate>20190108</startdate><enddate>20190108</enddate><creator>BAI YANWEN</creator><creator>CHIU CHIN TIEN</creator><creator>LIU YANGMING</creator><creator>BAI YE</creator><creator>ZHANG YAZHOU</creator><creator>LIAO CHIH CHIN</creator><creator>MA SHINENG</creator><scope>EVB</scope></search><sort><creationdate>20190108</creationdate><title>SEMICONDUCTOR DEVICE INCLUDING CONTROL SWITCHES TO REDUCE PIN CAPACITANCE</title><author>BAI YANWEN ; CHIU CHIN TIEN ; LIU YANGMING ; BAI YE ; ZHANG YAZHOU ; LIAO CHIH CHIN ; MA SHINENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20190002278A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES</topic><topic>MICROSTRUCTURAL TECHNOLOGY</topic><topic>PERFORMING OPERATIONS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>BAI YANWEN</creatorcontrib><creatorcontrib>CHIU CHIN TIEN</creatorcontrib><creatorcontrib>LIU YANGMING</creatorcontrib><creatorcontrib>BAI YE</creatorcontrib><creatorcontrib>ZHANG YAZHOU</creatorcontrib><creatorcontrib>LIAO CHIH CHIN</creatorcontrib><creatorcontrib>MA SHINENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BAI YANWEN</au><au>CHIU CHIN TIEN</au><au>LIU YANGMING</au><au>BAI YE</au><au>ZHANG YAZHOU</au><au>LIAO CHIH CHIN</au><au>MA SHINENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE INCLUDING CONTROL SWITCHES TO REDUCE PIN CAPACITANCE</title><date>2019-01-08</date><risdate>2019</risdate><abstract>Disclosed, in the present invention, is a semiconductor device which enables a semiconductor die in a stack of semiconductor dies to transmit or receive signals, and includes a control switch electrically insulating remaining dies in the stack of dies. By electrically insulating a non-enabled semiconductor die among the stack of dies, a parasitic pin capacitance can be reduced or prevented.
본 발명은 반도체 다이의 스택 중의 반도체 다이를 인에이블링하여 신호를 송신하거나 수신하고, 아울러 다이 스택 중의 나머지의 다이를 전기적으로 절연시키는 제어 스위치를 포함하는 반도체 장치를 개시한다. 다이 스택 중의 인에이블링되지 않은 반도체 다이를 전기적으로 절연시켜, 기생 핀 커패시턴스를 감소시키거나 방지한다.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng ; kor |
| recordid | cdi_epo_espacenet_KR20190002278A |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES MICROSTRUCTURAL TECHNOLOGY PERFORMING OPERATIONS SEMICONDUCTOR DEVICES TRANSPORTING |
| title | SEMICONDUCTOR DEVICE INCLUDING CONTROL SWITCHES TO REDUCE PIN CAPACITANCE |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-20T20%3A51%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BAI%20YANWEN&rft.date=2019-01-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20190002278A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |