METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes the steps of: preparing a first semi-finished product with a preliminary solder on the upper side of a conductive spacer together with the lower side of the conductive spacer soldered to a second conductive member; preparing a second semi-fi...
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creator | OKUMURA TOMOMI SATO KAISEI HATASA KEITA |
description | A method for manufacturing a semiconductor device includes the steps of: preparing a first semi-finished product with a preliminary solder on the upper side of a conductive spacer together with the lower side of the conductive spacer soldered to a second conductive member; preparing a second semi-finished product with a bonding wire bonded to the upper side of the semiconductor device together with the lower side of the semiconductor device soldered to a first conductive member; and soldering the upper side of the second semi-finished product to the lower side of the conductive spacer of the first semi-finished product by using the preliminary solder of the first semi-finished product. Accordingly, the present invention can reduce manufacturing costs.
반도체 장치의 제조 방법은, 제2 도전성 부재에 도전성 스페이서의 하면이 납땜되어 있음과 함께, 도전성 스페이서의 상면에 예비 땜납이 설치된 제1 반제품을 준비하는 공정과, 제1 도전성 부재에 반도체 소자의 하면이 납땜되어 있음과 함께, 반도체 소자의 상면에 본딩 와이어가 접합된 제2 반제품을 준비하는 공정과, 제1 반제품의 예비 땜납을 용융하여, 제2 반제품의 반도체 소자의 상면을, 제1 반제품의 도전성 스페이서의 하면에 납땜하는 공정을 구비한다. |
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반도체 장치의 제조 방법은, 제2 도전성 부재에 도전성 스페이서의 하면이 납땜되어 있음과 함께, 도전성 스페이서의 상면에 예비 땜납이 설치된 제1 반제품을 준비하는 공정과, 제1 도전성 부재에 반도체 소자의 하면이 납땜되어 있음과 함께, 반도체 소자의 상면에 본딩 와이어가 접합된 제2 반제품을 준비하는 공정과, 제1 반제품의 예비 땜납을 용융하여, 제2 반제품의 반도체 소자의 상면을, 제1 반제품의 도전성 스페이서의 하면에 납땜하는 공정을 구비한다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180627&DB=EPODOC&CC=KR&NR=20180071169A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180627&DB=EPODOC&CC=KR&NR=20180071169A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OKUMURA TOMOMI</creatorcontrib><creatorcontrib>SATO KAISEI</creatorcontrib><creatorcontrib>HATASA KEITA</creatorcontrib><title>METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE</title><description>A method for manufacturing a semiconductor device includes the steps of: preparing a first semi-finished product with a preliminary solder on the upper side of a conductive spacer together with the lower side of the conductive spacer soldered to a second conductive member; preparing a second semi-finished product with a bonding wire bonded to the upper side of the semiconductor device together with the lower side of the semiconductor device soldered to a first conductive member; and soldering the upper side of the second semi-finished product to the lower side of the conductive spacer of the first semi-finished product by using the preliminary solder of the first semi-finished product. Accordingly, the present invention can reduce manufacturing costs.
반도체 장치의 제조 방법은, 제2 도전성 부재에 도전성 스페이서의 하면이 납땜되어 있음과 함께, 도전성 스페이서의 상면에 예비 땜납이 설치된 제1 반제품을 준비하는 공정과, 제1 도전성 부재에 반도체 소자의 하면이 납땜되어 있음과 함께, 반도체 소자의 상면에 본딩 와이어가 접합된 제2 반제품을 준비하는 공정과, 제1 반제품의 예비 땜납을 용융하여, 제2 반제품의 반도체 소자의 상면을, 제1 반제품의 도전성 스페이서의 하면에 납땜하는 공정을 구비한다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND1dQ3x8HdRcPMPUvB19At1c3QOCQ3y9HNXCHb19XT293MJdQ4Byrm4hnk6u_IwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUknjvICMDQwsDA3NDQzNLR2PiVAEAZJgmgQ</recordid><startdate>20180627</startdate><enddate>20180627</enddate><creator>OKUMURA TOMOMI</creator><creator>SATO KAISEI</creator><creator>HATASA KEITA</creator><scope>EVB</scope></search><sort><creationdate>20180627</creationdate><title>METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE</title><author>OKUMURA TOMOMI ; SATO KAISEI ; HATASA KEITA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20180071169A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>OKUMURA TOMOMI</creatorcontrib><creatorcontrib>SATO KAISEI</creatorcontrib><creatorcontrib>HATASA KEITA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OKUMURA TOMOMI</au><au>SATO KAISEI</au><au>HATASA KEITA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE</title><date>2018-06-27</date><risdate>2018</risdate><abstract>A method for manufacturing a semiconductor device includes the steps of: preparing a first semi-finished product with a preliminary solder on the upper side of a conductive spacer together with the lower side of the conductive spacer soldered to a second conductive member; preparing a second semi-finished product with a bonding wire bonded to the upper side of the semiconductor device together with the lower side of the semiconductor device soldered to a first conductive member; and soldering the upper side of the second semi-finished product to the lower side of the conductive spacer of the first semi-finished product by using the preliminary solder of the first semi-finished product. Accordingly, the present invention can reduce manufacturing costs.
반도체 장치의 제조 방법은, 제2 도전성 부재에 도전성 스페이서의 하면이 납땜되어 있음과 함께, 도전성 스페이서의 상면에 예비 땜납이 설치된 제1 반제품을 준비하는 공정과, 제1 도전성 부재에 반도체 소자의 하면이 납땜되어 있음과 함께, 반도체 소자의 상면에 본딩 와이어가 접합된 제2 반제품을 준비하는 공정과, 제1 반제품의 예비 땜납을 용융하여, 제2 반제품의 반도체 소자의 상면을, 제1 반제품의 도전성 스페이서의 하면에 납땜하는 공정을 구비한다.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
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