SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY AND CACHE MEMORY AND COMPUTER SYSTAM HAVING THE SAME

A semiconductor memory device including a non-volatile memory and a cache memory and a computer system comprising the same are disclosed. The cache memory according to an embodiment of the present invention comprises: a first storage area including a plurality of data blocks for storing data; and a...

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Hauptverfasser: KIM, SUN GYEUM, KWON, YOUNG JUN, AHN, JUN WHAN, CHOI, KI YOUNG, KWON, HYEOK MAN
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creator KIM, SUN GYEUM
KWON, YOUNG JUN
AHN, JUN WHAN
CHOI, KI YOUNG
KWON, HYEOK MAN
description A semiconductor memory device including a non-volatile memory and a cache memory and a computer system comprising the same are disclosed. The cache memory according to an embodiment of the present invention comprises: a first storage area including a plurality of data blocks for storing data; and a second storage area for including m number of ECC blocks corresponding to n number of data blocks, wherein each of the first and the second storage areas includes non-volatile memory cells. At least one ECC block stores first information indicating an ECC parity for correcting an error bit of the corresponding data block and a position of the corresponding data block.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20140067819A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20140067819A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20140067819A3</originalsourceid><addsrcrecordid>eNqNy7sKwkAQheE0FqK-w4B1IFHxUg6zo1nM7oa9BFKFIGslMRDfHxW0sLM68POdadI7VpKMFoG8saBYGduA4FoSg9RUBiH1CbTRaW1K9LLkL0ItgJCK32BUFTxbcI3zqKDA-v33L-VQ8TyZXLvbGBefnSXLI3sq0jjc2zgO3SX28dGe7SrLN1m23e3zA67_U09eTDg6</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY AND CACHE MEMORY AND COMPUTER SYSTAM HAVING THE SAME</title><source>esp@cenet</source><creator>KIM, SUN GYEUM ; KWON, YOUNG JUN ; AHN, JUN WHAN ; CHOI, KI YOUNG ; KWON, HYEOK MAN</creator><creatorcontrib>KIM, SUN GYEUM ; KWON, YOUNG JUN ; AHN, JUN WHAN ; CHOI, KI YOUNG ; KWON, HYEOK MAN</creatorcontrib><description>A semiconductor memory device including a non-volatile memory and a cache memory and a computer system comprising the same are disclosed. The cache memory according to an embodiment of the present invention comprises: a first storage area including a plurality of data blocks for storing data; and a second storage area for including m number of ECC blocks corresponding to n number of data blocks, wherein each of the first and the second storage areas includes non-volatile memory cells. At least one ECC block stores first information indicating an ECC parity for correcting an error bit of the corresponding data block and a position of the corresponding data block.</description><language>eng ; kor</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140605&amp;DB=EPODOC&amp;CC=KR&amp;NR=20140067819A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140605&amp;DB=EPODOC&amp;CC=KR&amp;NR=20140067819A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM, SUN GYEUM</creatorcontrib><creatorcontrib>KWON, YOUNG JUN</creatorcontrib><creatorcontrib>AHN, JUN WHAN</creatorcontrib><creatorcontrib>CHOI, KI YOUNG</creatorcontrib><creatorcontrib>KWON, HYEOK MAN</creatorcontrib><title>SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY AND CACHE MEMORY AND COMPUTER SYSTAM HAVING THE SAME</title><description>A semiconductor memory device including a non-volatile memory and a cache memory and a computer system comprising the same are disclosed. The cache memory according to an embodiment of the present invention comprises: a first storage area including a plurality of data blocks for storing data; and a second storage area for including m number of ECC blocks corresponding to n number of data blocks, wherein each of the first and the second storage areas includes non-volatile memory cells. At least one ECC block stores first information indicating an ECC parity for correcting an error bit of the corresponding data block and a position of the corresponding data block.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy7sKwkAQheE0FqK-w4B1IFHxUg6zo1nM7oa9BFKFIGslMRDfHxW0sLM68POdadI7VpKMFoG8saBYGduA4FoSg9RUBiH1CbTRaW1K9LLkL0ItgJCK32BUFTxbcI3zqKDA-v33L-VQ8TyZXLvbGBefnSXLI3sq0jjc2zgO3SX28dGe7SrLN1m23e3zA67_U09eTDg6</recordid><startdate>20140605</startdate><enddate>20140605</enddate><creator>KIM, SUN GYEUM</creator><creator>KWON, YOUNG JUN</creator><creator>AHN, JUN WHAN</creator><creator>CHOI, KI YOUNG</creator><creator>KWON, HYEOK MAN</creator><scope>EVB</scope></search><sort><creationdate>20140605</creationdate><title>SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY AND CACHE MEMORY AND COMPUTER SYSTAM HAVING THE SAME</title><author>KIM, SUN GYEUM ; KWON, YOUNG JUN ; AHN, JUN WHAN ; CHOI, KI YOUNG ; KWON, HYEOK MAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20140067819A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2014</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>KIM, SUN GYEUM</creatorcontrib><creatorcontrib>KWON, YOUNG JUN</creatorcontrib><creatorcontrib>AHN, JUN WHAN</creatorcontrib><creatorcontrib>CHOI, KI YOUNG</creatorcontrib><creatorcontrib>KWON, HYEOK MAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIM, SUN GYEUM</au><au>KWON, YOUNG JUN</au><au>AHN, JUN WHAN</au><au>CHOI, KI YOUNG</au><au>KWON, HYEOK MAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY AND CACHE MEMORY AND COMPUTER SYSTAM HAVING THE SAME</title><date>2014-06-05</date><risdate>2014</risdate><abstract>A semiconductor memory device including a non-volatile memory and a cache memory and a computer system comprising the same are disclosed. The cache memory according to an embodiment of the present invention comprises: a first storage area including a plurality of data blocks for storing data; and a second storage area for including m number of ECC blocks corresponding to n number of data blocks, wherein each of the first and the second storage areas includes non-volatile memory cells. At least one ECC block stores first information indicating an ECC parity for correcting an error bit of the corresponding data block and a position of the corresponding data block.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
title SEMICONDUCTOR MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY AND CACHE MEMORY AND COMPUTER SYSTAM HAVING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T04%3A35%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KIM,%20SUN%20GYEUM&rft.date=2014-06-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20140067819A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true