A CMOS DEVICE AND METHOD OF FORMING THE SAME

A CMOS device and a method for forming the same are disclosed. A semiconductor device includes a substrate including a first region and a second region. The semiconductor device a first buffer layer formed on the upper part of the substrate between a first isolation region and a second isolation region in the first region, and a second buffer layer formed on the upper part of the substrate between a first isolation region and a second isolation region in the second region. The semiconductor device includes a first fin structure formed on the upper part of the first buffer layer between the first isolation region and the second isolation region in the first region, and a second fin structure formed on the upper part of the first buffer layer between the first isolation region and the second isolation region in the second region. The normal surface of the first buffer layer is different the normal surface of the second buffer layer. [Reference numerals] (102) Provide a substrate including NMOS area and PMOS area;(104) Form a separate feature within NMOS area and PMOS area;(106) Etch back the substrate not for covering the side wall of the separation feature within the NMOS area and the PMOS area;(108) Form a first semiconductor material on the side wall of the separation feature within the NMOS area and the PMOS area;(110) Form a second semiconductor material on the side wall of the separation feature within the NMOS area and the PMOS area;(112) Perform a flattening process on the substrate for removing excessive second semiconductor materials and form a mask on the upper surface of substrate within the PMOS area;(114) By removing the second semiconductor materials from the NMOS area, top surface of the first semiconductor material does not covered and a third semiconductor material is formed on the side wall of the separation feature within the NMOS area and the first semiconductor materials;(116) Perform the flattening process on the substrate for removing excessive third semiconductor materials and the mask and recess the separation feature to define a pin structure within the NMOS area and the PMOS area;(118) Finish production