WAFER LEVEL, CHIP SCALE SEMICONDUCTOR DEVICE PACKAGING COMPOSITIONS, AND METHODS RELATING THERETO

PURPOSE: A composition for packaging a wafer-level and chip-scale semiconductor device and a method for the same are provided to form dense circuit lines with a small-scale without the application of photo-lithography. CONSTITUTION: A bonding pad(102) is formed on one part of a substrate(100). A die...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	TSAI BIN HONG (COLIN), LEE YUEH LING, CHEN CHENG CHUNG, CHU JAMES, YUN HAO
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMISTRY COMPOSITIONS BASED THEREON COMPOSITIONS OF MACROMOLECULAR COMPOUNDS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY METALLURGY ORGANIC MACROMOLECULAR COMPOUNDS SEMICONDUCTOR DEVICES THEIR PREPARATION OR CHEMICAL WORKING-UP USE OF INORGANIC OR NON-MACROMOLECULAR ORGANIC SUBSTANCES ASCOMPOUNDING INGREDIENTS
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