MANUFACTURING METHOD FOR SEMI-POLISHED WAFER AND EVALUATION METHOD USING THE SAME

MANUFACTURING METHOD FOR SEMI-POLISHED WAFER AND EVALUATION METHOD USING THE SAME

PURPOSE: A manufacturing method for a semi-polished wafer and an evaluation method using the same are provided to reduce a process time and costs by applying a conventional method to a method of processing semi-polished wafer. CONSTITUTION: In a manufacturing method for a semi-polished wafer and an...

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Bibliographische Detailangaben
Hauptverfasser: KIM, JANG SEOP, PARK, TAE JIN, KIM, YOUNG HUN
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Zusammenfassung:PURPOSE: A manufacturing method for a semi-polished wafer and an evaluation method using the same are provided to reduce a process time and costs by applying a conventional method to a method of processing semi-polished wafer. CONSTITUTION: In a manufacturing method for a semi-polished wafer and an evaluation method using the same, a semi-polished wafer is proved(S1). A slug wafer is etched by etching solution(S2). A semi-polished wafer is cleaned(S3). The semi-polished wafer is etched by SC-1(standard cleaning 1 solution) and the surface of the wafer is improved(S4). The surface of improved semi-polished wafer is cleaned(S5). The surface defect of the semi-polished wafer is analyzed(S6).