LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE

LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE

A low power POR(Power-On-Reset) circuit generates a stable reset pulse at any slopes by combining an optimized transient circuit and a level detection circuit inside a chip and including the slopes which each circuit charges. A level detection circuit(200) generates a first reset pulse signal in the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KIM, WHAN WOOK, KIM, YOON KI
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator KIM, WHAN WOOK
KIM, YOON KI
description A low power POR(Power-On-Reset) circuit generates a stable reset pulse at any slopes by combining an optimized transient circuit and a level detection circuit inside a chip and including the slopes which each circuit charges. A level detection circuit(200) generates a first reset pulse signal in the range where the slope of the power supply voltage is the first slope or less by receiving the power supply voltage from the outside. A transient detection circuit(300) generates the second reset pulse signal in the range where the slope of the power supply voltage is the second slope(ST) or greater by receiving the power supply voltage from the outside. The first slope is equal to or smaller than the second slope. An OR circuit(400) performs the OR operation of the first reset pulse signal and the second reset pulse signal.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20080097760A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20080097760A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20080097760A3</originalsourceid><addsrcrecordid>eNrjZPDy8Q9XCPAPdw2CkLr-frpBrsGuIQrOnkHOoZ4hCkGu7o5BLj6uwcEK_m4KIR6uCsE-_gGuIE6wf2iQs6tCmL9PiKO7Kw8Da1piTnEqL5TmZlB2cw1x9tBNLciPTy0uSExOzUstifcOMjIwsDAwsDQ3NzNwNCZOFQAb-y5R</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE</title><source>esp@cenet</source><creator>KIM, WHAN WOOK ; KIM, YOON KI</creator><creatorcontrib>KIM, WHAN WOOK ; KIM, YOON KI</creatorcontrib><description>A low power POR(Power-On-Reset) circuit generates a stable reset pulse at any slopes by combining an optimized transient circuit and a level detection circuit inside a chip and including the slopes which each circuit charges. A level detection circuit(200) generates a first reset pulse signal in the range where the slope of the power supply voltage is the first slope or less by receiving the power supply voltage from the outside. A transient detection circuit(300) generates the second reset pulse signal in the range where the slope of the power supply voltage is the second slope(ST) or greater by receiving the power supply voltage from the outside. The first slope is equal to or smaller than the second slope. An OR circuit(400) performs the OR operation of the first reset pulse signal and the second reset pulse signal.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20081106&amp;DB=EPODOC&amp;CC=KR&amp;NR=20080097760A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20081106&amp;DB=EPODOC&amp;CC=KR&amp;NR=20080097760A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM, WHAN WOOK</creatorcontrib><creatorcontrib>KIM, YOON KI</creatorcontrib><title>LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE</title><description>A low power POR(Power-On-Reset) circuit generates a stable reset pulse at any slopes by combining an optimized transient circuit and a level detection circuit inside a chip and including the slopes which each circuit charges. A level detection circuit(200) generates a first reset pulse signal in the range where the slope of the power supply voltage is the first slope or less by receiving the power supply voltage from the outside. A transient detection circuit(300) generates the second reset pulse signal in the range where the slope of the power supply voltage is the second slope(ST) or greater by receiving the power supply voltage from the outside. The first slope is equal to or smaller than the second slope. An OR circuit(400) performs the OR operation of the first reset pulse signal and the second reset pulse signal.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPDy8Q9XCPAPdw2CkLr-frpBrsGuIQrOnkHOoZ4hCkGu7o5BLj6uwcEK_m4KIR6uCsE-_gGuIE6wf2iQs6tCmL9PiKO7Kw8Da1piTnEqL5TmZlB2cw1x9tBNLciPTy0uSExOzUstifcOMjIwsDAwsDQ3NzNwNCZOFQAb-y5R</recordid><startdate>20081106</startdate><enddate>20081106</enddate><creator>KIM, WHAN WOOK</creator><creator>KIM, YOON KI</creator><scope>EVB</scope></search><sort><creationdate>20081106</creationdate><title>LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE</title><author>KIM, WHAN WOOK ; KIM, YOON KI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20080097760A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>KIM, WHAN WOOK</creatorcontrib><creatorcontrib>KIM, YOON KI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIM, WHAN WOOK</au><au>KIM, YOON KI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE</title><date>2008-11-06</date><risdate>2008</risdate><abstract>A low power POR(Power-On-Reset) circuit generates a stable reset pulse at any slopes by combining an optimized transient circuit and a level detection circuit inside a chip and including the slopes which each circuit charges. A level detection circuit(200) generates a first reset pulse signal in the range where the slope of the power supply voltage is the first slope or less by receiving the power supply voltage from the outside. A transient detection circuit(300) generates the second reset pulse signal in the range where the slope of the power supply voltage is the second slope(ST) or greater by receiving the power supply voltage from the outside. The first slope is equal to or smaller than the second slope. An OR circuit(400) performs the OR operation of the first reset pulse signal and the second reset pulse signal.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_KR20080097760A
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title LOW POWER POWER-ON-RESET CIRCUIT REGARDLESS OF THE SLOPE OF SOURCE VOLTAGE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-18T16%3A06%3A29IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KIM,%20WHAN%20WOOK&rft.date=2008-11-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20080097760A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true