TAG ID STRUCTURE
A tag ID structure for processing a logic is provided to require no additional memory allocation by enabling a PCU(Process Control Unit) to perform the logic in reference to an allocated memory address and improve tag ID processing speed by enabling the PCU to access directly a memory and loading a...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A tag ID structure for processing a logic is provided to require no additional memory allocation by enabling a PCU(Process Control Unit) to perform the logic in reference to an allocated memory address and improve tag ID processing speed by enabling the PCU to access directly a memory and loading a value, as a tag ID is designed to include memory address information to be used by the logic. Memory address information used for a logic is allocated to a tag ID, which is the minimum unit identifier of a code. The tag ID comprises a value ID having an address of a memory map, a reference ID including address information of the value ID, a virtual ID, which is used for processing a user defined function, having I/O(Input/Output) information and mapped to the value ID in log processing, and a register ID to be used in a library defining the function. |
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