INTERFACE CIRCUIT CAPABLE OF PERFORMING SELF TEST
An interface circuit capable of performing a self test is provided to test jitter tolerance without using test equipment. A test circuit(340) generates a parallel test signal. A jitter generator(310) adds jitter to the parallel test signal. A serial converter(320) converts the jitter-added parallel...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | An interface circuit capable of performing a self test is provided to test jitter tolerance without using test equipment. A test circuit(340) generates a parallel test signal. A jitter generator(310) adds jitter to the parallel test signal. A serial converter(320) converts the jitter-added parallel test signal into a serial signal. A parallel converter(330) converts the serial signal outputted from the serial converter into a parallel output signal. The test circuit judges whether the parallel test signal coincides with the parallel test signal outputted from the parallel converter. |
---|