APPARATUS AND METHOD FOR HIGE SPEED INTERFACING IN INTERGARATED CIRCUIT
A device and a method for interfacing ICs at high speed are provided to synchronize channels for data output of a serial gigabit receiver embedded in each IC, insert a comma when the embedded serial gigabit receiver inputs the continuous data, and prevent the embedded serial gigabit receiver from ou...
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| creator | KIM, SOON JU JUNG, MIN SOO LEE, JIN SEOK JUNG, KWANG YUNG KIM, SONG HUN |
| description | A device and a method for interfacing ICs at high speed are provided to synchronize channels for data output of a serial gigabit receiver embedded in each IC, insert a comma when the embedded serial gigabit receiver inputs the continuous data, and prevent the embedded serial gigabit receiver from outputting a garbage value. A blank generator(303) generates a blank clock by adjusting a transfer rate of the data. A comma inserter(305) inserts the comma into the blank clock. A transmitter(309) transmits a bit string comprising the data and the comma to another IC. The generator includes a register sequentially storing the data received through 'N' buses, an extractor extracting the data stored in the register through 'N+1' buses, and a counter determining a data output time point. The generator stores the data received through the 'N+1' buses for a part of a time section, and stores and outputs the data received through the 'N+1' buses for the remaining time section at the same time. |
| format | Patent |
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A blank generator(303) generates a blank clock by adjusting a transfer rate of the data. A comma inserter(305) inserts the comma into the blank clock. A transmitter(309) transmits a bit string comprising the data and the comma to another IC. The generator includes a register sequentially storing the data received through 'N' buses, an extractor extracting the data stored in the register through 'N+1' buses, and a counter determining a data output time point. The generator stores the data received through the 'N+1' buses for a part of a time section, and stores and outputs the data received through the 'N+1' buses for the remaining time section at the same time.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080117&DB=EPODOC&CC=KR&NR=20080007178A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080117&DB=EPODOC&CC=KR&NR=20080007178A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM, SOON JU</creatorcontrib><creatorcontrib>JUNG, MIN SOO</creatorcontrib><creatorcontrib>LEE, JIN SEOK</creatorcontrib><creatorcontrib>JUNG, KWANG YUNG</creatorcontrib><creatorcontrib>KIM, SONG HUN</creatorcontrib><title>APPARATUS AND METHOD FOR HIGE SPEED INTERFACING IN INTERGARATED CIRCUIT</title><description>A device and a method for interfacing ICs at high speed are provided to synchronize channels for data output of a serial gigabit receiver embedded in each IC, insert a comma when the embedded serial gigabit receiver inputs the continuous data, and prevent the embedded serial gigabit receiver from outputting a garbage value. A blank generator(303) generates a blank clock by adjusting a transfer rate of the data. A comma inserter(305) inserts the comma into the blank clock. A transmitter(309) transmits a bit string comprising the data and the comma to another IC. The generator includes a register sequentially storing the data received through 'N' buses, an extractor extracting the data stored in the register through 'N+1' buses, and a counter determining a data output time point. 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A blank generator(303) generates a blank clock by adjusting a transfer rate of the data. A comma inserter(305) inserts the comma into the blank clock. A transmitter(309) transmits a bit string comprising the data and the comma to another IC. The generator includes a register sequentially storing the data received through 'N' buses, an extractor extracting the data stored in the register through 'N+1' buses, and a counter determining a data output time point. The generator stores the data received through the 'N+1' buses for a part of a time section, and stores and outputs the data received through the 'N+1' buses for the remaining time section at the same time.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | APPARATUS AND METHOD FOR HIGE SPEED INTERFACING IN INTERGARATED CIRCUIT |
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