MANAGEMENT OF ERASED BLOCKS IN FLASH MEMORIES

The invention relates to a method for managing the erasure process in a memory system comprising individually erasable memory blocks (SB) that can be addressed with the aid of real memory block addresses (SBA). Said memory blocks are sub-divided into a plurality of writable sectors and can be addressed by means of an address conversion that uses an allocator table (ZT) to convert logical block addresses (LBA) into one of the respective memory block addresses (SBA). According to the invention, the allocator table (ZT) is sub-divided into at least one useful data area (NB) and a buffer block area (BB). The invention is characterised in that a first identifier erased (ER), indicating the physical erasure status and a second identifier content erased (CER), indicating the logical erasure status, is set for each memory block (SB) in the allocator table (ZT).