PRINTED CIRCUIT BOARD MAKING METHOD

A PCB(Printed Circuit Board) fabrication method is provided to previously prevent formation of a dendrite and relatively reduce a defective rate of the PCB by not exposing a circuit pattern or a wire bonding pad on a cut surface generated by routing or punching. A PCB making method includes the step...

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Hauptverfasser: MYUNG, BOK SIK, LEE, SUNG GUE, NAM, SANG HYUCK, PARK, SE HOON
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Sprache:eng
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creator MYUNG, BOK SIK
LEE, SUNG GUE
NAM, SANG HYUCK
PARK, SE HOON
description A PCB(Printed Circuit Board) fabrication method is provided to previously prevent formation of a dendrite and relatively reduce a defective rate of the PCB by not exposing a circuit pattern or a wire bonding pad on a cut surface generated by routing or punching. A PCB making method includes the steps of: forming at least a wire bonding pad(24) and a ball pad(26) to be exposed to the surface of the PCB(20); forming an electroless plating layer(30) on the wire bonding pad(24) and the ball pad(26); forming a conductive coating layer on the surface of the PCB(20) having the bonding pad(24) and the ball pad(26); exposing the wire bonding pad(24) by removing a part of the conductive coating layer except a region where the wire bonding pad(24) is formed in a state of shielding the conductive coating layer with a mask; performing plating by supplying power onto the wire bonding pad(24) through the conductive coating layer; and removing the mask and the conductive coating layer.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20060111197A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20060111197A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20060111197A3</originalsourceid><addsrcrecordid>eNrjZFAOCPL0C3F1UXD2DHIO9QxRcPJ3DHJR8HX09vRzV_B1DfHwd-FhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHeQUYGBmYGhkBgae5oTJwqANTRI2c</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED CIRCUIT BOARD MAKING METHOD</title><source>esp@cenet</source><creator>MYUNG, BOK SIK ; LEE, SUNG GUE ; NAM, SANG HYUCK ; PARK, SE HOON</creator><creatorcontrib>MYUNG, BOK SIK ; LEE, SUNG GUE ; NAM, SANG HYUCK ; PARK, SE HOON</creatorcontrib><description>A PCB(Printed Circuit Board) fabrication method is provided to previously prevent formation of a dendrite and relatively reduce a defective rate of the PCB by not exposing a circuit pattern or a wire bonding pad on a cut surface generated by routing or punching. A PCB making method includes the steps of: forming at least a wire bonding pad(24) and a ball pad(26) to be exposed to the surface of the PCB(20); forming an electroless plating layer(30) on the wire bonding pad(24) and the ball pad(26); forming a conductive coating layer on the surface of the PCB(20) having the bonding pad(24) and the ball pad(26); exposing the wire bonding pad(24) by removing a part of the conductive coating layer except a region where the wire bonding pad(24) is formed in a state of shielding the conductive coating layer with a mask; performing plating by supplying power onto the wire bonding pad(24) through the conductive coating layer; and removing the mask and the conductive coating layer.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20061026&amp;DB=EPODOC&amp;CC=KR&amp;NR=20060111197A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20061026&amp;DB=EPODOC&amp;CC=KR&amp;NR=20060111197A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MYUNG, BOK SIK</creatorcontrib><creatorcontrib>LEE, SUNG GUE</creatorcontrib><creatorcontrib>NAM, SANG HYUCK</creatorcontrib><creatorcontrib>PARK, SE HOON</creatorcontrib><title>PRINTED CIRCUIT BOARD MAKING METHOD</title><description>A PCB(Printed Circuit Board) fabrication method is provided to previously prevent formation of a dendrite and relatively reduce a defective rate of the PCB by not exposing a circuit pattern or a wire bonding pad on a cut surface generated by routing or punching. A PCB making method includes the steps of: forming at least a wire bonding pad(24) and a ball pad(26) to be exposed to the surface of the PCB(20); forming an electroless plating layer(30) on the wire bonding pad(24) and the ball pad(26); forming a conductive coating layer on the surface of the PCB(20) having the bonding pad(24) and the ball pad(26); exposing the wire bonding pad(24) by removing a part of the conductive coating layer except a region where the wire bonding pad(24) is formed in a state of shielding the conductive coating layer with a mask; performing plating by supplying power onto the wire bonding pad(24) through the conductive coating layer; and removing the mask and the conductive coating layer.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAOCPL0C3F1UXD2DHIO9QxRcPJ3DHJR8HX09vRzV_B1DfHwd-FhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHeQUYGBmYGhkBgae5oTJwqANTRI2c</recordid><startdate>20061026</startdate><enddate>20061026</enddate><creator>MYUNG, BOK SIK</creator><creator>LEE, SUNG GUE</creator><creator>NAM, SANG HYUCK</creator><creator>PARK, SE HOON</creator><scope>EVB</scope></search><sort><creationdate>20061026</creationdate><title>PRINTED CIRCUIT BOARD MAKING METHOD</title><author>MYUNG, BOK SIK ; LEE, SUNG GUE ; NAM, SANG HYUCK ; PARK, SE HOON</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20060111197A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>MYUNG, BOK SIK</creatorcontrib><creatorcontrib>LEE, SUNG GUE</creatorcontrib><creatorcontrib>NAM, SANG HYUCK</creatorcontrib><creatorcontrib>PARK, SE HOON</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MYUNG, BOK SIK</au><au>LEE, SUNG GUE</au><au>NAM, SANG HYUCK</au><au>PARK, SE HOON</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD MAKING METHOD</title><date>2006-10-26</date><risdate>2006</risdate><abstract>A PCB(Printed Circuit Board) fabrication method is provided to previously prevent formation of a dendrite and relatively reduce a defective rate of the PCB by not exposing a circuit pattern or a wire bonding pad on a cut surface generated by routing or punching. A PCB making method includes the steps of: forming at least a wire bonding pad(24) and a ball pad(26) to be exposed to the surface of the PCB(20); forming an electroless plating layer(30) on the wire bonding pad(24) and the ball pad(26); forming a conductive coating layer on the surface of the PCB(20) having the bonding pad(24) and the ball pad(26); exposing the wire bonding pad(24) by removing a part of the conductive coating layer except a region where the wire bonding pad(24) is formed in a state of shielding the conductive coating layer with a mask; performing plating by supplying power onto the wire bonding pad(24) through the conductive coating layer; and removing the mask and the conductive coating layer.</abstract><oa>free_for_read</oa></addata></record>
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subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title PRINTED CIRCUIT BOARD MAKING METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-04T16%3A48%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MYUNG,%20BOK%20SIK&rft.date=2006-10-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20060111197A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true