METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF

Dummy features (64, 65, 48a, 48b) are formed within an interlevel dielectric layer (36). In one embodiment, a non-gap filling dielectric layer (72) is formed over the dummy features (64, 65, 48a, 48b) to form voids (74) between the dummy features (64, 65, 48a, 48b) or a dummy feature (48a) and a cur...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LII YEONG JYH T, SOLOMENTSEV YURI E, SMITH BRADLEY P, YU KATHLEEN C, FILIPIAK STANLEY M, SPARKS TERRY G, STROZEWSKI KIRK J, FLAKE JOHN C, GOLDBERG CINDY K
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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