Method of forming semiconductor device with capacitor
PURPOSE: A method for fabricating a semiconductor device including a capacitor is provided to simplify the fabrication process without using an etch-stop layer by using a supporting layer and a sacrificial layer of different wet-etching speeds. CONSTITUTION: A supporting layer(116) and a sacrificial...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A method for fabricating a semiconductor device including a capacitor is provided to simplify the fabrication process without using an etch-stop layer by using a supporting layer and a sacrificial layer of different wet-etching speeds. CONSTITUTION: A supporting layer(116) and a sacrificial layer are sequentially formed on a semiconductor substrate(100). An opening portion(120) is formed by patterning sequentially the sacrificial layer and the supporting layer(116). An inner wall and a bottom face of the opening portion(120) are covered by a bottom electrode(122). The sacrificial layer is removed by using a wet-etch method. A dielectric layer and a top electrode(126a) are formed on the bottom electrode and the supporting layer. A wet-etching speed of the sacrificial layer is faster than the wet-etching speed of the supporting layer.
커패시터를 포함하는 반도체 소자의 형성 방법을 제공한다. 이 방법에 따르면, 반도체 기판 상에 지지막 및 희생막을 순차적으로 형성하고, 상기 희생막 및 상기 지지막을 순차적으로 패터닝하여 개구부를 형성하고, 상기 개구부의 내벽과 저면을 덮는 하부전극을 형성하고, 상기 희생막을 습식식각으로 제거하고, 상기 하부전극과 상기 지지막 상에 유전막 및 상부전극을 형성하되, 상기 희생막은 상기 지지막보다 습식 식각 속도가 빠른 물질로 형성한다. |
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