METHOD FOR FORMING TRENCH OF SEMICONDUCTOR DEVICE
PURPOSE: An STI(Shallow Trench Isolation) formation method of semiconductor devices is provided to reduce a stress and to omit an oxidation process by rounding bottom and sidewalls of a shallow trench. CONSTITUTION: A pad oxide layer(202) and a nitride layer(204) are sequentially formed on a semicon...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: An STI(Shallow Trench Isolation) formation method of semiconductor devices is provided to reduce a stress and to omit an oxidation process by rounding bottom and sidewalls of a shallow trench. CONSTITUTION: A pad oxide layer(202) and a nitride layer(204) are sequentially formed on a semiconductor substrate(200). A shallow trench(T2) having rounded bottom and sidewalls structure is formed by selectively etching the substrate(200) using a bias power of 370-900 W. An insulating layer(210) is sufficiently filled to the shallow trench(T2). An isolation layer is formed by planarizing the insulating layer(210). The shallow trench(T2) having rounded bottom and sidewalls structure is formed by RIE(Reactive Ion Etching) using HBr, CHF3 or CH4 gas. |
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