SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER

PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: HONG, SEONG HUI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator HONG, SEONG HUI
description PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20000066266A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20000066266A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20000066266A3</originalsourceid><addsrcrecordid>eNrjZLAKdvX1dPb3cwl1DvEPUvB19fUPilRwcQ3zdHZV8HAM8_RzV3AODQpy9QtRcHRxCXINDlZw9g_1C3EN4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8d5BRgYgYGZmZGbmaEycKgB7Xyoj</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><source>esp@cenet</source><creator>HONG, SEONG HUI</creator><creatorcontrib>HONG, SEONG HUI</creatorcontrib><description>PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).</description><edition>7</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20001115&amp;DB=EPODOC&amp;CC=KR&amp;NR=20000066266A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20001115&amp;DB=EPODOC&amp;CC=KR&amp;NR=20000066266A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HONG, SEONG HUI</creatorcontrib><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><description>PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKdvX1dPb3cwl1DvEPUvB19fUPilRwcQ3zdHZV8HAM8_RzV3AODQpy9QtRcHRxCXINDlZw9g_1C3EN4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8d5BRgYgYGZmZGbmaEycKgB7Xyoj</recordid><startdate>20001115</startdate><enddate>20001115</enddate><creator>HONG, SEONG HUI</creator><scope>EVB</scope></search><sort><creationdate>20001115</creationdate><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><author>HONG, SEONG HUI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20000066266A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>HONG, SEONG HUI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HONG, SEONG HUI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><date>2000-11-15</date><risdate>2000</risdate><abstract>PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_KR20000066266A
source esp@cenet
subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T11%3A36%3A35IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HONG,%20SEONG%20HUI&rft.date=2000-11-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20000066266A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true