SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER
PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a...
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creator | HONG, SEONG HUI |
description | PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20). |
format | Patent |
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CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).</description><edition>7</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20001115&DB=EPODOC&CC=KR&NR=20000066266A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20001115&DB=EPODOC&CC=KR&NR=20000066266A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HONG, SEONG HUI</creatorcontrib><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><description>PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKdvX1dPb3cwl1DvEPUvB19fUPilRwcQ3zdHZV8HAM8_RzV3AODQpy9QtRcHRxCXINDlZw9g_1C3EN4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8d5BRgYgYGZmZGbmaEycKgB7Xyoj</recordid><startdate>20001115</startdate><enddate>20001115</enddate><creator>HONG, SEONG HUI</creator><scope>EVB</scope></search><sort><creationdate>20001115</creationdate><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><author>HONG, SEONG HUI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20000066266A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>HONG, SEONG HUI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HONG, SEONG HUI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER</title><date>2000-11-15</date><risdate>2000</risdate><abstract>PURPOSE: A semiconductor memory device having a current address counter is provided to reduce the write test procedure and time by enabling to check write operation only with an input of continuous data after designating a first address. CONSTITUTION: In a module device of a DRAM having an EEPROM, a semiconductor memory device having a current address counter(20) performs the write operation of the whole chip by a continuous address signal being output through the current address counter. The current address counter(20) generates a series of continuous address signals by performing the counting with n bits in response to an input address signal during the current address write operation. Therefore, the device enables the sequential write only with data, without inputting the address by a clock synchronization, and therefore the number of clocks and the whole write time can be reduced. The circuit comprises a normal address counter(10) outputting a signal whose address is increased by +1 by m bit counting the input address signal and the current address counter(20).</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | SEMICONDUCTOR MEMORY DEVICE HAVING CURRENT ADDRESS COUNTER |
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