INTEGRATED CIRCUIT INCLUDING STANDARD CELLS METHOD AND COMPUTING SYSTEM FOR FABRICATING THE SAME
According to an exemplary embodiment of the present invention, an integrated circuit comprises: a standard cell including a first output fin and a second output fin to output the same output signal; a first routing path connected to the first output fin; and a second routing path connected to the se...
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| creator | KIM YONG GEOL KIM KYUNG BONG KIM MIN SU |
| description | According to an exemplary embodiment of the present invention, an integrated circuit comprises: a standard cell including a first output fin and a second output fin to output the same output signal; a first routing path connected to the first output fin; and a second routing path connected to the second output fin, wherein the first routing path includes a first cell group including at least one load cell, the second routing path includes a second cell group including at least one load cell, and the first routing path and the second routing path are electrically separated outside the standard cell.
집적 회로는, 본 개시의 예시적 실시 예에 따라, 동일한 출력 신호를 출력하는 제1 출력 핀 및 제2 출력 핀을 포함하는 표준 셀, 제1 출력 핀에 연결되는 제1 라우팅 패스, 및 제2 출력 핀에 연결되는 제2 라우팅 패스를 포함하고, 제1 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제1 셀 그룹을 포함하고, 제2 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제2 셀 그룹을 포함하고, 제1 라우팅 패스 및 제2 라우팅 패스는 표준 셀의 외부에서 전기적으로 분리된다. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR102157355BB1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR102157355BB1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR102157355BB13</originalsourceid><addsrcrecordid>eNqNirsKwjAUQLs4iPoPF5wFawnOedy0wSaR5GboVIvESbRQ_x9L8QOcDpxz1sXNOMI6cEIF0gSZDIFxsk3KuBoicad4mBO2bQSL1HgFswPp7TXR8nSR0IL2ATQXwUi-aGoQIre4LVaP4Tnl3Y-bYq-RZHPI47vP0zjc8yt_-ksoj6eSnSvGhCir_64vT280Vw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT INCLUDING STANDARD CELLS METHOD AND COMPUTING SYSTEM FOR FABRICATING THE SAME</title><source>esp@cenet</source><creator>KIM YONG GEOL ; KIM KYUNG BONG ; KIM MIN SU</creator><creatorcontrib>KIM YONG GEOL ; KIM KYUNG BONG ; KIM MIN SU</creatorcontrib><description>According to an exemplary embodiment of the present invention, an integrated circuit comprises: a standard cell including a first output fin and a second output fin to output the same output signal; a first routing path connected to the first output fin; and a second routing path connected to the second output fin, wherein the first routing path includes a first cell group including at least one load cell, the second routing path includes a second cell group including at least one load cell, and the first routing path and the second routing path are electrically separated outside the standard cell.
집적 회로는, 본 개시의 예시적 실시 예에 따라, 동일한 출력 신호를 출력하는 제1 출력 핀 및 제2 출력 핀을 포함하는 표준 셀, 제1 출력 핀에 연결되는 제1 라우팅 패스, 및 제2 출력 핀에 연결되는 제2 라우팅 패스를 포함하고, 제1 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제1 셀 그룹을 포함하고, 제2 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제2 셀 그룹을 포함하고, 제1 라우팅 패스 및 제2 라우팅 패스는 표준 셀의 외부에서 전기적으로 분리된다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200918&DB=EPODOC&CC=KR&NR=102157355B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200918&DB=EPODOC&CC=KR&NR=102157355B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIM YONG GEOL</creatorcontrib><creatorcontrib>KIM KYUNG BONG</creatorcontrib><creatorcontrib>KIM MIN SU</creatorcontrib><title>INTEGRATED CIRCUIT INCLUDING STANDARD CELLS METHOD AND COMPUTING SYSTEM FOR FABRICATING THE SAME</title><description>According to an exemplary embodiment of the present invention, an integrated circuit comprises: a standard cell including a first output fin and a second output fin to output the same output signal; a first routing path connected to the first output fin; and a second routing path connected to the second output fin, wherein the first routing path includes a first cell group including at least one load cell, the second routing path includes a second cell group including at least one load cell, and the first routing path and the second routing path are electrically separated outside the standard cell.
집적 회로는, 본 개시의 예시적 실시 예에 따라, 동일한 출력 신호를 출력하는 제1 출력 핀 및 제2 출력 핀을 포함하는 표준 셀, 제1 출력 핀에 연결되는 제1 라우팅 패스, 및 제2 출력 핀에 연결되는 제2 라우팅 패스를 포함하고, 제1 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제1 셀 그룹을 포함하고, 제2 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제2 셀 그룹을 포함하고, 제1 라우팅 패스 및 제2 라우팅 패스는 표준 셀의 외부에서 전기적으로 분리된다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNirsKwjAUQLs4iPoPF5wFawnOedy0wSaR5GboVIvESbRQ_x9L8QOcDpxz1sXNOMI6cEIF0gSZDIFxsk3KuBoicad4mBO2bQSL1HgFswPp7TXR8nSR0IL2ATQXwUi-aGoQIre4LVaP4Tnl3Y-bYq-RZHPI47vP0zjc8yt_-ksoj6eSnSvGhCir_64vT280Vw</recordid><startdate>20200918</startdate><enddate>20200918</enddate><creator>KIM YONG GEOL</creator><creator>KIM KYUNG BONG</creator><creator>KIM MIN SU</creator><scope>EVB</scope></search><sort><creationdate>20200918</creationdate><title>INTEGRATED CIRCUIT INCLUDING STANDARD CELLS METHOD AND COMPUTING SYSTEM FOR FABRICATING THE SAME</title><author>KIM YONG GEOL ; KIM KYUNG BONG ; KIM MIN SU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR102157355BB13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KIM YONG GEOL</creatorcontrib><creatorcontrib>KIM KYUNG BONG</creatorcontrib><creatorcontrib>KIM MIN SU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIM YONG GEOL</au><au>KIM KYUNG BONG</au><au>KIM MIN SU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT INCLUDING STANDARD CELLS METHOD AND COMPUTING SYSTEM FOR FABRICATING THE SAME</title><date>2020-09-18</date><risdate>2020</risdate><abstract>According to an exemplary embodiment of the present invention, an integrated circuit comprises: a standard cell including a first output fin and a second output fin to output the same output signal; a first routing path connected to the first output fin; and a second routing path connected to the second output fin, wherein the first routing path includes a first cell group including at least one load cell, the second routing path includes a second cell group including at least one load cell, and the first routing path and the second routing path are electrically separated outside the standard cell.
집적 회로는, 본 개시의 예시적 실시 예에 따라, 동일한 출력 신호를 출력하는 제1 출력 핀 및 제2 출력 핀을 포함하는 표준 셀, 제1 출력 핀에 연결되는 제1 라우팅 패스, 및 제2 출력 핀에 연결되는 제2 라우팅 패스를 포함하고, 제1 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제1 셀 그룹을 포함하고, 제2 라우팅 패스는 적어도 하나의 부하 셀을 포함하는 제2 셀 그룹을 포함하고, 제1 라우팅 패스 및 제2 라우팅 패스는 표준 셀의 외부에서 전기적으로 분리된다.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | INTEGRATED CIRCUIT INCLUDING STANDARD CELLS METHOD AND COMPUTING SYSTEM FOR FABRICATING THE SAME |
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