A FLAH EEPROM CELL AND METHOD OF THE MANUFACTURING THE SAME AND METHOD OF THE PROGRAM, THE ERASE, AND THE READ

PURPOSE: A method for manufacturing a flash EEPROM cell and a method for erasing and reading a program of the same are provided to form different values of saturation current by two floating gates. CONSTITUTION: A select gate(13) is formed by forming sequentially a select gate oxide layer(12), a polysilicon layer for select gate, and the dielectric layer(14) on a semiconductor substrate(11). The first dielectric layer spacer(15) is formed at a sidewall of the select gate(13). A threshold voltage control implantation process is performed at one side of the select gate(13). A tunnel oxide layer(17) is formed on an exposed portion of the semiconductor substrate(11). A polysilicon layer for floating gate is deposited on a whole structure. The first and the second floating gates(18a,18b) are formed by performing an etching process. A source region(19a) and a drain region(19b) are formed by implanting a dopant. A control gate(21) is formed by forming and patterning the second dielectric layer(20) and the polysilicon layer for control gate on the entire structure.