DMA READ AND CELL TRANSFER APPARATUS OF ATM CELL SEGMENTATION SYSTEM
A direct memory read and cell transmission apparatus for an ATM cell segmentation system having a host CPU is disclosed. The segmentation circuit of the apparatus transfers the address and size for the start of the DMA by the byte unit. When a predetermined information is provided, and a DMA read is...
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| creator | JUN, JONG AHM KIM, HYUP JONG LEE, GYOO HO KIM, JE GUN KIM, CHAHN |
| description | A direct memory read and cell transmission apparatus for an ATM cell segmentation system having a host CPU is disclosed. The segmentation circuit of the apparatus transfers the address and size for the start of the DMA by the byte unit. When a predetermined information is provided, and a DMA read is requested, the data is transferred through the bus of the word unit such as the PCI interface, and then necessary bytes are obtained for thereby forming a 32 bit word stream, so that the ATM cell of a 32 bitx12 word form and transfers to the lower circuit. Therefore, when the segmentation circuit processes the buffer, all data are computed by the byte unit, and in an application program, the data are not obtained for transmitting the data to the ATM cell, so that it is possible to enhance the processing capability. |
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The segmentation circuit of the apparatus transfers the address and size for the start of the DMA by the byte unit. When a predetermined information is provided, and a DMA read is requested, the data is transferred through the bus of the word unit such as the PCI interface, and then necessary bytes are obtained for thereby forming a 32 bit word stream, so that the ATM cell of a 32 bitx12 word form and transfers to the lower circuit. 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Therefore, when the segmentation circuit processes the buffer, all data are computed by the byte unit, and in an application program, the data are not obtained for transmitting the data to the ATM cell, so that it is possible to enhance the processing capability.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>SELECTING</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBx8XVUCHJ1dFFw9HNRcHb18VEICXL0C3ZzDVJwDAhwDHIMCQ1W8HdTcAzxhUgHu7r7uvqFOIZ4-vspBEcGh7j68jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gQwMDI2MzSxNDJydDY-JUAQDNCSxk</recordid><startdate>20000115</startdate><enddate>20000115</enddate><creator>JUN, JONG AHM</creator><creator>KIM, HYUP JONG</creator><creator>LEE, GYOO HO</creator><creator>KIM, JE GUN</creator><creator>KIM, CHAHN</creator><scope>EVB</scope></search><sort><creationdate>20000115</creationdate><title>DMA READ AND CELL TRANSFER APPARATUS OF ATM CELL SEGMENTATION SYSTEM</title><author>JUN, JONG AHM ; KIM, HYUP JONG ; LEE, GYOO HO ; KIM, JE GUN ; KIM, CHAHN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR100236941BB13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>SELECTING</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>JUN, JONG AHM</creatorcontrib><creatorcontrib>KIM, HYUP JONG</creatorcontrib><creatorcontrib>LEE, GYOO HO</creatorcontrib><creatorcontrib>KIM, JE GUN</creatorcontrib><creatorcontrib>KIM, CHAHN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JUN, JONG AHM</au><au>KIM, HYUP JONG</au><au>LEE, GYOO HO</au><au>KIM, JE GUN</au><au>KIM, CHAHN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DMA READ AND CELL TRANSFER APPARATUS OF ATM CELL SEGMENTATION SYSTEM</title><date>2000-01-15</date><risdate>2000</risdate><abstract>A direct memory read and cell transmission apparatus for an ATM cell segmentation system having a host CPU is disclosed. The segmentation circuit of the apparatus transfers the address and size for the start of the DMA by the byte unit. When a predetermined information is provided, and a DMA read is requested, the data is transferred through the bus of the word unit such as the PCI interface, and then necessary bytes are obtained for thereby forming a 32 bit word stream, so that the ATM cell of a 32 bitx12 word form and transfers to the lower circuit. Therefore, when the segmentation circuit processes the buffer, all data are computed by the byte unit, and in an application program, the data are not obtained for transmitting the data to the ATM cell, so that it is possible to enhance the processing capability.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY SELECTING TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | DMA READ AND CELL TRANSFER APPARATUS OF ATM CELL SEGMENTATION SYSTEM |
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