SELF TIMED COMMUNICATION INTERFACE AND DIGITAL DATA TRANSMISSION METHOD

A self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individualy phase aligned with the clock signal. The received clock...

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Hauptverfasser:	CASPER, DANIEL FRANCIS, LAVIOLA, WILLIAM CONSTANTINO, FERRAIOLO, FRANK DAVID, JORDAN, RICHARD CARROLL, CAPOWSKI, ROBERT STANLEY
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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creator	CASPER, DANIEL FRANCIS LAVIOLA, WILLIAM CONSTANTINO FERRAIOLO, FRANK DAVID JORDAN, RICHARD CARROLL CAPOWSKI, ROBERT STANLEY
description	A self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individualy phase aligned with the clock signal. The received clock signal is used to define boundary edges of a data bit cell individually for each line and the data on each line of the bus is individually phase adjusted so that, for example, a data transition position is in the center of the cell.
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The received data on each line of the bus is individualy phase aligned with the clock signal. The received clock signal is used to define boundary edges of a data bit cell individually for each line and the data on each line of the bus is individually phase adjusted so that, for example, a data transition position is in the center of the cell.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>1999</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19990715&DB=EPODOC&CC=KR&NR=100207880B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25566,76549</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19990715&DB=EPODOC&CC=KR&NR=100207880B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CASPER, DANIEL FRANCIS</creatorcontrib><creatorcontrib>LAVIOLA, WILLIAM CONSTANTINO</creatorcontrib><creatorcontrib>FERRAIOLO, FRANK DAVID</creatorcontrib><creatorcontrib>JORDAN, RICHARD CARROLL</creatorcontrib><creatorcontrib>CAPOWSKI, ROBERT STANLEY</creatorcontrib><title>SELF TIMED COMMUNICATION INTERFACE AND DIGITAL DATA TRANSMISSION METHOD</title><description>A self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. 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The received data on each line of the bus is individualy phase aligned with the clock signal. The received clock signal is used to define boundary edges of a data bit cell individually for each line and the data on each line of the bus is individually phase adjusted so that, for example, a data transition position is in the center of the cell.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title	SELF TIMED COMMUNICATION INTERFACE AND DIGITAL DATA TRANSMISSION METHOD
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