SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To improve the reliability of a protecting circuit by composing a MISFET of diode mode at its gate insulating film of the same insulating film as an interlayer insulating film, connecting its one semiconductor region and a gate electrode to wirings extended from an external electrode, and co...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KUBODERA MASAAKI, TACHIMORI HIROSHI, YAMAMOTO AKIRA
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator KUBODERA MASAAKI
TACHIMORI HIROSHI
YAMAMOTO AKIRA
description PURPOSE:To improve the reliability of a protecting circuit by composing a MISFET of diode mode at its gate insulating film of the same insulating film as an interlayer insulating film, connecting its one semiconductor region and a gate electrode to wirings extended from an external electrode, and connecting the other semiconductor region to a power source potential supplying wirings. CONSTITUTION:A MlSFETQ3 of higher threshold voltage than the threshold voltage of a MISFET of an internal circuit is formed in a diode mode between an external terminal BP and a MISFET of the internal circuit. The MISFETQ3 is formed at its gate insulating film of the insulating film 5 of the same layer as the interlayer insulating film for insulating between the conductive layers, connected at one semiconductor region 4 and a gate electrode 8G to wirings 8 extended from the electrode BP, and the other semiconductor region 4 is connected to wirings 7 for supplying a power source potential Vcc to the circuit. Thus, since the threshold voltage of the MISFETQ3 can be set to the degree of the operating voltage of high level appled to the MISFET of the internal circuit, an excess charge can be rapidly discharged.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS6354762A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS6354762A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS6354762A3</originalsourceid><addsrcrecordid>eNrjZFAPdvX1dPb3cwl1DvEPUvD0C3F1D3IMcXVRcPYMcg71DFFwcQ3zdHblYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxXgHBZsamJuZmRo7GRCgBAL8sI-8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><source>esp@cenet</source><creator>KUBODERA MASAAKI ; TACHIMORI HIROSHI ; YAMAMOTO AKIRA</creator><creatorcontrib>KUBODERA MASAAKI ; TACHIMORI HIROSHI ; YAMAMOTO AKIRA</creatorcontrib><description>PURPOSE:To improve the reliability of a protecting circuit by composing a MISFET of diode mode at its gate insulating film of the same insulating film as an interlayer insulating film, connecting its one semiconductor region and a gate electrode to wirings extended from an external electrode, and connecting the other semiconductor region to a power source potential supplying wirings. CONSTITUTION:A MlSFETQ3 of higher threshold voltage than the threshold voltage of a MISFET of an internal circuit is formed in a diode mode between an external terminal BP and a MISFET of the internal circuit. The MISFETQ3 is formed at its gate insulating film of the insulating film 5 of the same layer as the interlayer insulating film for insulating between the conductive layers, connected at one semiconductor region 4 and a gate electrode 8G to wirings 8 extended from the electrode BP, and the other semiconductor region 4 is connected to wirings 7 for supplying a power source potential Vcc to the circuit. Thus, since the threshold voltage of the MISFETQ3 can be set to the degree of the operating voltage of high level appled to the MISFET of the internal circuit, an excess charge can be rapidly discharged.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1988</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19880309&amp;DB=EPODOC&amp;CC=JP&amp;NR=S6354762A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19880309&amp;DB=EPODOC&amp;CC=JP&amp;NR=S6354762A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KUBODERA MASAAKI</creatorcontrib><creatorcontrib>TACHIMORI HIROSHI</creatorcontrib><creatorcontrib>YAMAMOTO AKIRA</creatorcontrib><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><description>PURPOSE:To improve the reliability of a protecting circuit by composing a MISFET of diode mode at its gate insulating film of the same insulating film as an interlayer insulating film, connecting its one semiconductor region and a gate electrode to wirings extended from an external electrode, and connecting the other semiconductor region to a power source potential supplying wirings. CONSTITUTION:A MlSFETQ3 of higher threshold voltage than the threshold voltage of a MISFET of an internal circuit is formed in a diode mode between an external terminal BP and a MISFET of the internal circuit. The MISFETQ3 is formed at its gate insulating film of the insulating film 5 of the same layer as the interlayer insulating film for insulating between the conductive layers, connected at one semiconductor region 4 and a gate electrode 8G to wirings 8 extended from the electrode BP, and the other semiconductor region 4 is connected to wirings 7 for supplying a power source potential Vcc to the circuit. Thus, since the threshold voltage of the MISFETQ3 can be set to the degree of the operating voltage of high level appled to the MISFET of the internal circuit, an excess charge can be rapidly discharged.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1988</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAPdvX1dPb3cwl1DvEPUvD0C3F1D3IMcXVRcPYMcg71DFFwcQ3zdHblYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxXgHBZsamJuZmRo7GRCgBAL8sI-8</recordid><startdate>19880309</startdate><enddate>19880309</enddate><creator>KUBODERA MASAAKI</creator><creator>TACHIMORI HIROSHI</creator><creator>YAMAMOTO AKIRA</creator><scope>EVB</scope></search><sort><creationdate>19880309</creationdate><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><author>KUBODERA MASAAKI ; TACHIMORI HIROSHI ; YAMAMOTO AKIRA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS6354762A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1988</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KUBODERA MASAAKI</creatorcontrib><creatorcontrib>TACHIMORI HIROSHI</creatorcontrib><creatorcontrib>YAMAMOTO AKIRA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KUBODERA MASAAKI</au><au>TACHIMORI HIROSHI</au><au>YAMAMOTO AKIRA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><date>1988-03-09</date><risdate>1988</risdate><abstract>PURPOSE:To improve the reliability of a protecting circuit by composing a MISFET of diode mode at its gate insulating film of the same insulating film as an interlayer insulating film, connecting its one semiconductor region and a gate electrode to wirings extended from an external electrode, and connecting the other semiconductor region to a power source potential supplying wirings. CONSTITUTION:A MlSFETQ3 of higher threshold voltage than the threshold voltage of a MISFET of an internal circuit is formed in a diode mode between an external terminal BP and a MISFET of the internal circuit. The MISFETQ3 is formed at its gate insulating film of the insulating film 5 of the same layer as the interlayer insulating film for insulating between the conductive layers, connected at one semiconductor region 4 and a gate electrode 8G to wirings 8 extended from the electrode BP, and the other semiconductor region 4 is connected to wirings 7 for supplying a power source potential Vcc to the circuit. Thus, since the threshold voltage of the MISFETQ3 can be set to the degree of the operating voltage of high level appled to the MISFET of the internal circuit, an excess charge can be rapidly discharged.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPS6354762A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T19%3A26%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KUBODERA%20MASAAKI&rft.date=1988-03-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS6354762A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true