COMMON BUS MONITOR

PURPOSE:To leave behind bus information to a bus cycle in which busy has been generated, by storing busy information and stopping the subsequent recording, when bus busy has been detected, and restarting the recording of the bus information after the busy has been recovered. CONSTITUTION:When a bus...

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1. Verfasser: MOTOKAWA HIROSHI
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description PURPOSE:To leave behind bus information to a bus cycle in which busy has been generated, by storing busy information and stopping the subsequent recording, when bus busy has been detected, and restarting the recording of the bus information after the busy has been recovered. CONSTITUTION:When a bus request is generated, a timer 7 is started. When a prescribed time T elapses after the start of the timer 7, a bus busy detecting circuit 8 decides that a bus to a bus cycle (n) is busy. By this decision, a stop of updating of an address is instructed to an address control circuit 9, and a stop of an input of bus information is instructed to a memory register 2. Also, simultaneously, by setting a flag to the bus cycle (n) of a busy information memory 4, it is stored to be busy. After the bus busy has been recovered, recording of the bus information is restarted continuously without sweeping away the bus information to the bus cycle (n).
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CONSTITUTION:When a bus request is generated, a timer 7 is started. When a prescribed time T elapses after the start of the timer 7, a bus busy detecting circuit 8 decides that a bus to a bus cycle (n) is busy. By this decision, a stop of updating of an address is instructed to an address control circuit 9, and a stop of an input of bus information is instructed to a memory register 2. Also, simultaneously, by setting a flag to the bus cycle (n) of a busy information memory 4, it is stored to be busy. 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CONSTITUTION:When a bus request is generated, a timer 7 is started. When a prescribed time T elapses after the start of the timer 7, a bus busy detecting circuit 8 decides that a bus to a bus cycle (n) is busy. By this decision, a stop of updating of an address is instructed to an address control circuit 9, and a stop of an input of bus information is instructed to a memory register 2. Also, simultaneously, by setting a flag to the bus cycle (n) of a busy information memory 4, it is stored to be busy. After the bus busy has been recovered, recording of the bus information is restarted continuously without sweeping away the bus information to the bus cycle (n).</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title COMMON BUS MONITOR
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