ANALOG AND DIGITAL CONVERTING CIRCUIT

PURPOSE:To perform digital conversion by a very small number of comparing means as compared with resolution by using digital outputs obtained from plural cascaded unit quantizing circuits as high-order digit bits successively. CONSTITUTION:An initial-stage unit quantizing circuit ADC1 quantizes an a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: TACHIKAWA KATSUHISA
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator TACHIKAWA KATSUHISA
description PURPOSE:To perform digital conversion by a very small number of comparing means as compared with resolution by using digital outputs obtained from plural cascaded unit quantizing circuits as high-order digit bits successively. CONSTITUTION:An initial-stage unit quantizing circuit ADC1 quantizes an analog input voltage in eight gradations for a full-scale voltage VFS to obtain digital signals D0 - D2 of three bits by conversion, and a trailing-stage unit quantizing circuit ADC2 uses comparison reference potentials right before and after the analog input voltage level among comparison reference potentials generated by a resistance voltage dividing circuit DR1 included in the initial-stage unit quantizing circuit ADC1 as a relative full scale and quantizes the analog input voltage in four gradations to obtain digital signals D3 and D4 of two bits by conversion. The digital signals D3 and D4 constitute low-order digit bits and thus digital conversion to five bits is performed by 12 comparing circuits.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS63107233A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS63107233A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS63107233A3</originalsourceid><addsrcrecordid>eNrjZFB19HP08XdXcPRzUXDxdPcMcfRRcPb3C3MNCvH0c1dw9gxyDvUM4WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BwWbGhgbmRsbGjsbEqAEAlbMjaw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ANALOG AND DIGITAL CONVERTING CIRCUIT</title><source>esp@cenet</source><creator>TACHIKAWA KATSUHISA</creator><creatorcontrib>TACHIKAWA KATSUHISA</creatorcontrib><description>PURPOSE:To perform digital conversion by a very small number of comparing means as compared with resolution by using digital outputs obtained from plural cascaded unit quantizing circuits as high-order digit bits successively. CONSTITUTION:An initial-stage unit quantizing circuit ADC1 quantizes an analog input voltage in eight gradations for a full-scale voltage VFS to obtain digital signals D0 - D2 of three bits by conversion, and a trailing-stage unit quantizing circuit ADC2 uses comparison reference potentials right before and after the analog input voltage level among comparison reference potentials generated by a resistance voltage dividing circuit DR1 included in the initial-stage unit quantizing circuit ADC1 as a relative full scale and quantizes the analog input voltage in four gradations to obtain digital signals D3 and D4 of two bits by conversion. The digital signals D3 and D4 constitute low-order digit bits and thus digital conversion to five bits is performed by 12 comparing circuits.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>1988</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19880512&amp;DB=EPODOC&amp;CC=JP&amp;NR=S63107233A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19880512&amp;DB=EPODOC&amp;CC=JP&amp;NR=S63107233A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TACHIKAWA KATSUHISA</creatorcontrib><title>ANALOG AND DIGITAL CONVERTING CIRCUIT</title><description>PURPOSE:To perform digital conversion by a very small number of comparing means as compared with resolution by using digital outputs obtained from plural cascaded unit quantizing circuits as high-order digit bits successively. CONSTITUTION:An initial-stage unit quantizing circuit ADC1 quantizes an analog input voltage in eight gradations for a full-scale voltage VFS to obtain digital signals D0 - D2 of three bits by conversion, and a trailing-stage unit quantizing circuit ADC2 uses comparison reference potentials right before and after the analog input voltage level among comparison reference potentials generated by a resistance voltage dividing circuit DR1 included in the initial-stage unit quantizing circuit ADC1 as a relative full scale and quantizes the analog input voltage in four gradations to obtain digital signals D3 and D4 of two bits by conversion. The digital signals D3 and D4 constitute low-order digit bits and thus digital conversion to five bits is performed by 12 comparing circuits.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1988</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB19HP08XdXcPRzUXDxdPcMcfRRcPb3C3MNCvH0c1dw9gxyDvUM4WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BwWbGhgbmRsbGjsbEqAEAlbMjaw</recordid><startdate>19880512</startdate><enddate>19880512</enddate><creator>TACHIKAWA KATSUHISA</creator><scope>EVB</scope></search><sort><creationdate>19880512</creationdate><title>ANALOG AND DIGITAL CONVERTING CIRCUIT</title><author>TACHIKAWA KATSUHISA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS63107233A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1988</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>TACHIKAWA KATSUHISA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TACHIKAWA KATSUHISA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ANALOG AND DIGITAL CONVERTING CIRCUIT</title><date>1988-05-12</date><risdate>1988</risdate><abstract>PURPOSE:To perform digital conversion by a very small number of comparing means as compared with resolution by using digital outputs obtained from plural cascaded unit quantizing circuits as high-order digit bits successively. CONSTITUTION:An initial-stage unit quantizing circuit ADC1 quantizes an analog input voltage in eight gradations for a full-scale voltage VFS to obtain digital signals D0 - D2 of three bits by conversion, and a trailing-stage unit quantizing circuit ADC2 uses comparison reference potentials right before and after the analog input voltage level among comparison reference potentials generated by a resistance voltage dividing circuit DR1 included in the initial-stage unit quantizing circuit ADC1 as a relative full scale and quantizes the analog input voltage in four gradations to obtain digital signals D3 and D4 of two bits by conversion. The digital signals D3 and D4 constitute low-order digit bits and thus digital conversion to five bits is performed by 12 comparing circuits.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPS63107233A
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
title ANALOG AND DIGITAL CONVERTING CIRCUIT
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T08%3A27%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=TACHIKAWA%20KATSUHISA&rft.date=1988-05-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS63107233A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true