COMPOUND SEMICONDUCTOR DEVICE

PURPOSE:To decrease the channel resistance and to improve the high frequency characteristics, by providing a p-type layer on the surface of an n-type channel layer. CONSTITUTION:N type regions 2 for providing source and drain are formed on one principal surface of a semi-insulating GaAs substrate 1....

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Bibliographische Detailangaben
1. Verfasser: FUKUYAMA RYOICHI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To decrease the channel resistance and to improve the high frequency characteristics, by providing a p-type layer on the surface of an n-type channel layer. CONSTITUTION:N type regions 2 for providing source and drain are formed on one principal surface of a semi-insulating GaAs substrate 1. An n-type activated layer (channel section) 3 and a gate electrode 5 are formed between the regions 2. In a GaAs MESFET constructed in this way, a shallow p-type layer 12 is formed on the surface of the n-type activated layer 3 except the region thereof located directly below the gate electrode. This p-type layer 12 has a function of inhibiting the production of a surface depletion layer. Thus, the production of a surface depletion layer can be effectively prevented even if the surface level density is increased, and therefore the channel resistance can be decreased. Further, since the channel resistance is not varied by the effect of a depletion layer, the high frequency characteristics can be improved.