MANUFACTURE OF SEMICONDUCTOR ELEMENT
PURPOSE:To prevent the generation of the dielectric breakdown of a gate insulating film by forming an insulating film onto a polycrystalline silicon film constituting a semiconductor layer and an electrode onto the insulating film and using a diffusion method in order to dope an impurity. CONSTITUTI...
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creator | MIKI HIDEJIRO SUZUKI ZENZO |
description | PURPOSE:To prevent the generation of the dielectric breakdown of a gate insulating film by forming an insulating film onto a polycrystalline silicon film constituting a semiconductor layer and an electrode onto the insulating film and using a diffusion method in order to dope an impurity. CONSTITUTION:Quite the same formation as conventional devices is conducted, and phosphrous is diffused to the whole upper surface, thus intruding phosphorous to a polycrystalline silicon film 2, then shaping a phosphorus glass film 7 on the surface. Since a gate electrode 5 is also formed by polycrystalline silicon, phosphorus is also diffused to the gate electrode 5, and the phosphorus glass film 7 is also shaped to the surface of the gate electrode. When the phosphorus glass film 7 on the upper surface is removed, a TFT with source-drain regions 8 through the diffusion of an n-type impurity is acquired. Accordingly, a diffusion method is used without employing an ion implantation method in order to dope the impurity to the polycryatalline silicon film, on the surface thereof the electrode is shaped through an insulating film, thus preventing the breakdown of the insulating film due to a charge-up, then improving yield on the manufacture of a semiconductor element. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS61222173A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS61222173A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS61222173A3</originalsourceid><addsrcrecordid>eNrjZFDxdfQLdXN0DgkNclXwd1MIdvX1dPb3cwl1DvEPUnD1cfV19QvhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBZoZGRkaG5saOxsSoAQCVPiNs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MANUFACTURE OF SEMICONDUCTOR ELEMENT</title><source>esp@cenet</source><creator>MIKI HIDEJIRO ; SUZUKI ZENZO</creator><creatorcontrib>MIKI HIDEJIRO ; SUZUKI ZENZO</creatorcontrib><description>PURPOSE:To prevent the generation of the dielectric breakdown of a gate insulating film by forming an insulating film onto a polycrystalline silicon film constituting a semiconductor layer and an electrode onto the insulating film and using a diffusion method in order to dope an impurity. CONSTITUTION:Quite the same formation as conventional devices is conducted, and phosphrous is diffused to the whole upper surface, thus intruding phosphorous to a polycrystalline silicon film 2, then shaping a phosphorus glass film 7 on the surface. Since a gate electrode 5 is also formed by polycrystalline silicon, phosphorus is also diffused to the gate electrode 5, and the phosphorus glass film 7 is also shaped to the surface of the gate electrode. When the phosphorus glass film 7 on the upper surface is removed, a TFT with source-drain regions 8 through the diffusion of an n-type impurity is acquired. Accordingly, a diffusion method is used without employing an ion implantation method in order to dope the impurity to the polycryatalline silicon film, on the surface thereof the electrode is shaped through an insulating film, thus preventing the breakdown of the insulating film due to a charge-up, then improving yield on the manufacture of a semiconductor element.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1986</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19861002&DB=EPODOC&CC=JP&NR=S61222173A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19861002&DB=EPODOC&CC=JP&NR=S61222173A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MIKI HIDEJIRO</creatorcontrib><creatorcontrib>SUZUKI ZENZO</creatorcontrib><title>MANUFACTURE OF SEMICONDUCTOR ELEMENT</title><description>PURPOSE:To prevent the generation of the dielectric breakdown of a gate insulating film by forming an insulating film onto a polycrystalline silicon film constituting a semiconductor layer and an electrode onto the insulating film and using a diffusion method in order to dope an impurity. CONSTITUTION:Quite the same formation as conventional devices is conducted, and phosphrous is diffused to the whole upper surface, thus intruding phosphorous to a polycrystalline silicon film 2, then shaping a phosphorus glass film 7 on the surface. Since a gate electrode 5 is also formed by polycrystalline silicon, phosphorus is also diffused to the gate electrode 5, and the phosphorus glass film 7 is also shaped to the surface of the gate electrode. When the phosphorus glass film 7 on the upper surface is removed, a TFT with source-drain regions 8 through the diffusion of an n-type impurity is acquired. Accordingly, a diffusion method is used without employing an ion implantation method in order to dope the impurity to the polycryatalline silicon film, on the surface thereof the electrode is shaped through an insulating film, thus preventing the breakdown of the insulating film due to a charge-up, then improving yield on the manufacture of a semiconductor element.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1986</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFDxdfQLdXN0DgkNclXwd1MIdvX1dPb3cwl1DvEPUnD1cfV19QvhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBZoZGRkaG5saOxsSoAQCVPiNs</recordid><startdate>19861002</startdate><enddate>19861002</enddate><creator>MIKI HIDEJIRO</creator><creator>SUZUKI ZENZO</creator><scope>EVB</scope></search><sort><creationdate>19861002</creationdate><title>MANUFACTURE OF SEMICONDUCTOR ELEMENT</title><author>MIKI HIDEJIRO ; SUZUKI ZENZO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS61222173A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1986</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MIKI HIDEJIRO</creatorcontrib><creatorcontrib>SUZUKI ZENZO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MIKI HIDEJIRO</au><au>SUZUKI ZENZO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MANUFACTURE OF SEMICONDUCTOR ELEMENT</title><date>1986-10-02</date><risdate>1986</risdate><abstract>PURPOSE:To prevent the generation of the dielectric breakdown of a gate insulating film by forming an insulating film onto a polycrystalline silicon film constituting a semiconductor layer and an electrode onto the insulating film and using a diffusion method in order to dope an impurity. CONSTITUTION:Quite the same formation as conventional devices is conducted, and phosphrous is diffused to the whole upper surface, thus intruding phosphorous to a polycrystalline silicon film 2, then shaping a phosphorus glass film 7 on the surface. Since a gate electrode 5 is also formed by polycrystalline silicon, phosphorus is also diffused to the gate electrode 5, and the phosphorus glass film 7 is also shaped to the surface of the gate electrode. When the phosphorus glass film 7 on the upper surface is removed, a TFT with source-drain regions 8 through the diffusion of an n-type impurity is acquired. Accordingly, a diffusion method is used without employing an ion implantation method in order to dope the impurity to the polycryatalline silicon film, on the surface thereof the electrode is shaped through an insulating film, thus preventing the breakdown of the insulating film due to a charge-up, then improving yield on the manufacture of a semiconductor element.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | MANUFACTURE OF SEMICONDUCTOR ELEMENT |
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