CHANGING POINT ENCODING CIRCUIT FOR EMPLOYING MEMORY

PURPOSE:To latch the 2nd latch circuit by equipping a memory circuit and the 2nd latch circuit between a latch circuit between a latch circuit and a parallel/serial shift register and code-converting a code character of four bits into the code system of a decode circuit at the reception side. CONSTI...

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1. Verfasser: KUROSAKI MASAHIKO
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description PURPOSE:To latch the 2nd latch circuit by equipping a memory circuit and the 2nd latch circuit between a latch circuit between a latch circuit and a parallel/serial shift register and code-converting a code character of four bits into the code system of a decode circuit at the reception side. CONSTITUTION:Receiving an encoded reception data S20 and a quick clock S21, a changing point detection circuit C11 outputs signal lines S23 and S24 for showing at which phase the data S20 is encoded and the polarity S25 of the data. Receiving a clock S22, a clock generator circuit C12 outputs clocks S26-S29 having phases shifted by 90 deg. each. By the signal lines S23 and S24 a selection circuit C13 selects and outputs any one of four clocks S26-S29 to a signal line S30. Thus the code character of the changing point encoding system at the transmission side can be stored in a memory circuit without modifying the circuit constitution of the encoding circuit, and a code is converted in the memory circuit, whereby the code character can be converted into the one matching to the decoder circuit at the reception side to be transmitted.
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CONSTITUTION:Receiving an encoded reception data S20 and a quick clock S21, a changing point detection circuit C11 outputs signal lines S23 and S24 for showing at which phase the data S20 is encoded and the polarity S25 of the data. Receiving a clock S22, a clock generator circuit C12 outputs clocks S26-S29 having phases shifted by 90 deg. each. By the signal lines S23 and S24 a selection circuit C13 selects and outputs any one of four clocks S26-S29 to a signal line S30. Thus the code character of the changing point encoding system at the transmission side can be stored in a memory circuit without modifying the circuit constitution of the encoding circuit, and a code is converted in the memory circuit, whereby the code character can be converted into the one matching to the decoder circuit at the reception side to be transmitted.</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>1986</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19860603&amp;DB=EPODOC&amp;CC=JP&amp;NR=S61116446A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25555,76308</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19860603&amp;DB=EPODOC&amp;CC=JP&amp;NR=S61116446A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KUROSAKI MASAHIKO</creatorcontrib><title>CHANGING POINT ENCODING CIRCUIT FOR EMPLOYING MEMORY</title><description>PURPOSE:To latch the 2nd latch circuit by equipping a memory circuit and the 2nd latch circuit between a latch circuit between a latch circuit and a parallel/serial shift register and code-converting a code character of four bits into the code system of a decode circuit at the reception side. CONSTITUTION:Receiving an encoded reception data S20 and a quick clock S21, a changing point detection circuit C11 outputs signal lines S23 and S24 for showing at which phase the data S20 is encoded and the polarity S25 of the data. Receiving a clock S22, a clock generator circuit C12 outputs clocks S26-S29 having phases shifted by 90 deg. each. By the signal lines S23 and S24 a selection circuit C13 selects and outputs any one of four clocks S26-S29 to a signal line S30. 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CONSTITUTION:Receiving an encoded reception data S20 and a quick clock S21, a changing point detection circuit C11 outputs signal lines S23 and S24 for showing at which phase the data S20 is encoded and the polarity S25 of the data. Receiving a clock S22, a clock generator circuit C12 outputs clocks S26-S29 having phases shifted by 90 deg. each. By the signal lines S23 and S24 a selection circuit C13 selects and outputs any one of four clocks S26-S29 to a signal line S30. Thus the code character of the changing point encoding system at the transmission side can be stored in a memory circuit without modifying the circuit constitution of the encoding circuit, and a code is converted in the memory circuit, whereby the code character can be converted into the one matching to the decoder circuit at the reception side to be transmitted.</abstract><oa>free_for_read</oa></addata></record>
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title CHANGING POINT ENCODING CIRCUIT FOR EMPLOYING MEMORY
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