SEMICONDUCTOR DEVICE

PURPOSE:To improve yield and reliability by a method wherein the specified area of substrate and surface step difference of synchronous type RS flip-flop circuit are reduced utilizing hetero-junction bipolar transistors as elements. CONSTITUTION:N type GaAs layers 22, 26, n type AlGaAs layers 23, 25...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
1. Verfasser:	OOSHIMA TOSHIO
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	OOSHIMA TOSHIO
description	PURPOSE:To improve yield and reliability by a method wherein the specified area of substrate and surface step difference of synchronous type RS flip-flop circuit are reduced utilizing hetero-junction bipolar transistors as elements. CONSTITUTION:N type GaAs layers 22, 26, n type AlGaAs layers 23, 25 and a p type GaAs layer 24 are respectively formed on a semi-insulated GaAs substrate. Besides element separating regions 27A, 27B implanted with protion or O ion and element separating regions 27B between transistor elements T1- T2-T3and T4-T5-T6 are terminated in an n type AlGaAs layer 23 while the regions in the layer 23 are mutually connected by an n type GaAs layer 22. Moreover, 28 is a p type region, 31 is a base electrode, 32C and 32E are electrodes while as for the transistor element T1 and T4, layers 23 and 25 are respectively a collector and an emitter; as for T2, T3, T5 and T6, layers 23 and 25 are reversely an emitter and a collector assuming 32C and 32E respectively to be a collector electrode and an emitter electrode.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS60164353A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS60164353A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS60164353A3</originalsourceid><addsrcrecordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcFmBoZmJsamxo7GxKgBAIowHvo</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>OOSHIMA TOSHIO</creator><creatorcontrib>OOSHIMA TOSHIO</creatorcontrib><description>PURPOSE:To improve yield and reliability by a method wherein the specified area of substrate and surface step difference of synchronous type RS flip-flop circuit are reduced utilizing hetero-junction bipolar transistors as elements. CONSTITUTION:N<+> type GaAs layers 22, 26, n type AlGaAs layers 23, 25 and a p type GaAs layer 24 are respectively formed on a semi-insulated GaAs substrate. Besides element separating regions 27A, 27B implanted with protion or O<+> ion and element separating regions 27B between transistor elements T1- T2-T3and T4-T5-T6 are terminated in an n type AlGaAs layer 23 while the regions in the layer 23 are mutually connected by an n<+> type GaAs layer 22. Moreover, 28 is a p<+> type region, 31 is a base electrode, 32C and 32E are electrodes while as for the transistor element T1 and T4, layers 23 and 25 are respectively a collector and an emitter; as for T2, T3, T5 and T6, layers 23 and 25 are reversely an emitter and a collector assuming 32C and 32E respectively to be a collector electrode and an emitter electrode.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1985</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19850827&DB=EPODOC&CC=JP&NR=S60164353A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19850827&DB=EPODOC&CC=JP&NR=S60164353A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OOSHIMA TOSHIO</creatorcontrib><title>SEMICONDUCTOR DEVICE</title><description>PURPOSE:To improve yield and reliability by a method wherein the specified area of substrate and surface step difference of synchronous type RS flip-flop circuit are reduced utilizing hetero-junction bipolar transistors as elements. CONSTITUTION:N<+> type GaAs layers 22, 26, n type AlGaAs layers 23, 25 and a p type GaAs layer 24 are respectively formed on a semi-insulated GaAs substrate. Besides element separating regions 27A, 27B implanted with protion or O<+> ion and element separating regions 27B between transistor elements T1- T2-T3and T4-T5-T6 are terminated in an n type AlGaAs layer 23 while the regions in the layer 23 are mutually connected by an n<+> type GaAs layer 22. Moreover, 28 is a p<+> type region, 31 is a base electrode, 32C and 32E are electrodes while as for the transistor element T1 and T4, layers 23 and 25 are respectively a collector and an emitter; as for T2, T3, T5 and T6, layers 23 and 25 are reversely an emitter and a collector assuming 32C and 32E respectively to be a collector electrode and an emitter electrode.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1985</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcFmBoZmJsamxo7GxKgBAIowHvo</recordid><startdate>19850827</startdate><enddate>19850827</enddate><creator>OOSHIMA TOSHIO</creator><scope>EVB</scope></search><sort><creationdate>19850827</creationdate><title>SEMICONDUCTOR DEVICE</title><author>OOSHIMA TOSHIO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS60164353A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1985</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>OOSHIMA TOSHIO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OOSHIMA TOSHIO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE</title><date>1985-08-27</date><risdate>1985</risdate><abstract>PURPOSE:To improve yield and reliability by a method wherein the specified area of substrate and surface step difference of synchronous type RS flip-flop circuit are reduced utilizing hetero-junction bipolar transistors as elements. CONSTITUTION:N<+> type GaAs layers 22, 26, n type AlGaAs layers 23, 25 and a p type GaAs layer 24 are respectively formed on a semi-insulated GaAs substrate. Besides element separating regions 27A, 27B implanted with protion or O<+> ion and element separating regions 27B between transistor elements T1- T2-T3and T4-T5-T6 are terminated in an n type AlGaAs layer 23 while the regions in the layer 23 are mutually connected by an n<+> type GaAs layer 22. Moreover, 28 is a p<+> type region, 31 is a base electrode, 32C and 32E are electrodes while as for the transistor element T1 and T4, layers 23 and 25 are respectively a collector and an emitter; as for T2, T3, T5 and T6, layers 23 and 25 are reversely an emitter and a collector assuming 32C and 32E respectively to be a collector electrode and an emitter electrode.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_JPS60164353A
source	esp@cenet
subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	SEMICONDUCTOR DEVICE
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-14T19%3A05%3A23IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=OOSHIMA%20TOSHIO&rft.date=1985-08-27&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS60164353A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true