MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE

MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE

PURPOSE:To obtain a new method of forming a semiconductor chip having a through hole coated with an insulation film with a structure more suitable for laminated integration, by a method wherein the through hole is formed by two steps. CONSTITUTION:An SiO2 film 601 is formed on the surface of an Si c...

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1. Verfasser: KETSUSAKO MITSUNORI
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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description PURPOSE:To obtain a new method of forming a semiconductor chip having a through hole coated with an insulation film with a structure more suitable for laminated integration, by a method wherein the through hole is formed by two steps. CONSTITUTION:An SiO2 film 601 is formed on the surface of an Si crystal substrate 600, which is then provided with an aperture 602, and a fine hole 603 is formed by using the oxide film 601 as a mask. An insulation film 604 is formed on the inner wall of this fine hole 603 and coated with polycrystalline Si605, and the Si605 is removed with the fine hole part left. Next, an Al607 is formed on the back, and a fine hole 608 is provided by etching until the bottom of the hole 603 is exposed. Then, a CVD-SiO2 609 is deposited, and the bottom of the fine hole is provided with an aperture 610. A multilayer metal film 614 is patterned by vapor deposition, and a solder layer is formed by plating and then patterned again with the same shape as the metal film 614 of the base; then, the solder layer becomes spherical by heating, resulting in the formation of solder bumps 611 and 612.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS60140850A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS60140850A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS60140850A3</originalsourceid><addsrcrecordid>eNqNyjsKAjEQANA0FqLeYTyAEPGD7TCZ6IhJluxEsFoWiZXownp_bDyA1Wve1PiAsXgkLZkhebhgkIjKDiQqHzOqpAh6axhaDkIpukKaMpBkKqLg-CrEczN59M-xLn7OzNKz0mlVh3dXx6G_11f9dOem3dv11h52Fjf_nC_Zlizc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE</title><source>esp@cenet</source><creator>KETSUSAKO MITSUNORI</creator><creatorcontrib>KETSUSAKO MITSUNORI</creatorcontrib><description>PURPOSE:To obtain a new method of forming a semiconductor chip having a through hole coated with an insulation film with a structure more suitable for laminated integration, by a method wherein the through hole is formed by two steps. CONSTITUTION:An SiO2 film 601 is formed on the surface of an Si crystal substrate 600, which is then provided with an aperture 602, and a fine hole 603 is formed by using the oxide film 601 as a mask. An insulation film 604 is formed on the inner wall of this fine hole 603 and coated with polycrystalline Si605, and the Si605 is removed with the fine hole part left. Next, an Al607 is formed on the back, and a fine hole 608 is provided by etching until the bottom of the hole 603 is exposed. Then, a CVD-SiO2 609 is deposited, and the bottom of the fine hole is provided with an aperture 610. A multilayer metal film 614 is patterned by vapor deposition, and a solder layer is formed by plating and then patterned again with the same shape as the metal film 614 of the base; then, the solder layer becomes spherical by heating, resulting in the formation of solder bumps 611 and 612.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1985</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19850725&amp;DB=EPODOC&amp;CC=JP&amp;NR=S60140850A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19850725&amp;DB=EPODOC&amp;CC=JP&amp;NR=S60140850A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KETSUSAKO MITSUNORI</creatorcontrib><title>MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE</title><description>PURPOSE:To obtain a new method of forming a semiconductor chip having a through hole coated with an insulation film with a structure more suitable for laminated integration, by a method wherein the through hole is formed by two steps. CONSTITUTION:An SiO2 film 601 is formed on the surface of an Si crystal substrate 600, which is then provided with an aperture 602, and a fine hole 603 is formed by using the oxide film 601 as a mask. An insulation film 604 is formed on the inner wall of this fine hole 603 and coated with polycrystalline Si605, and the Si605 is removed with the fine hole part left. Next, an Al607 is formed on the back, and a fine hole 608 is provided by etching until the bottom of the hole 603 is exposed. Then, a CVD-SiO2 609 is deposited, and the bottom of the fine hole is provided with an aperture 610. A multilayer metal film 614 is patterned by vapor deposition, and a solder layer is formed by plating and then patterned again with the same shape as the metal film 614 of the base; then, the solder layer becomes spherical by heating, resulting in the formation of solder bumps 611 and 612.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1985</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjsKAjEQANA0FqLeYTyAEPGD7TCZ6IhJluxEsFoWiZXownp_bDyA1Wve1PiAsXgkLZkhebhgkIjKDiQqHzOqpAh6axhaDkIpukKaMpBkKqLg-CrEczN59M-xLn7OzNKz0mlVh3dXx6G_11f9dOem3dv11h52Fjf_nC_Zlizc</recordid><startdate>19850725</startdate><enddate>19850725</enddate><creator>KETSUSAKO MITSUNORI</creator><scope>EVB</scope></search><sort><creationdate>19850725</creationdate><title>MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE</title><author>KETSUSAKO MITSUNORI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS60140850A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1985</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KETSUSAKO MITSUNORI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KETSUSAKO MITSUNORI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE</title><date>1985-07-25</date><risdate>1985</risdate><abstract>PURPOSE:To obtain a new method of forming a semiconductor chip having a through hole coated with an insulation film with a structure more suitable for laminated integration, by a method wherein the through hole is formed by two steps. CONSTITUTION:An SiO2 film 601 is formed on the surface of an Si crystal substrate 600, which is then provided with an aperture 602, and a fine hole 603 is formed by using the oxide film 601 as a mask. An insulation film 604 is formed on the inner wall of this fine hole 603 and coated with polycrystalline Si605, and the Si605 is removed with the fine hole part left. Next, an Al607 is formed on the back, and a fine hole 608 is provided by etching until the bottom of the hole 603 is exposed. Then, a CVD-SiO2 609 is deposited, and the bottom of the fine hole is provided with an aperture 610. A multilayer metal film 614 is patterned by vapor deposition, and a solder layer is formed by plating and then patterned again with the same shape as the metal film 614 of the base; then, the solder layer becomes spherical by heating, resulting in the formation of solder bumps 611 and 612.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title MANUFACTURE OF LAMINATED INTEGRATION TYPE SEMICONDUCTOR CIRCUIT DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T22%3A17%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KETSUSAKO%20MITSUNORI&rft.date=1985-07-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS60140850A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true