SEMICONDUCTOR LOGIC CIRCUIT DEVICE

PURPOSE:To enable the reduction in chip area by reducing the useless region remaining in the chip periphery by a method wherein the shape of a functional block is made orthogonal-polygonal in the chip periphery. CONSTITUTION:In case of application to the CMOS logical VLSI designed by the hierarchy t...

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Bibliographische Detailangaben
1. Verfasser: MIURA CHIHEI
Format: Patent
Sprache:eng
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