JPS5935113B

PURPOSE:To use one buffer memory for other backup, by using a part of regions of the 1st and 2nd buffer memories as local storage. CONSTITUTION:In writing in, e.g. control data to a local storage area LS, the inarea address of the area LS is set to a section 1-2 of an address register 1 and an LS si...

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Hauptverfasser:	YAMAMURO YOSHIO, NODA KATSUNOBU
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	YAMAMURO YOSHIO NODA KATSUNOBU
description	PURPOSE:To use one buffer memory for other backup, by using a part of regions of the 1st and 2nd buffer memories as local storage. CONSTITUTION:In writing in, e.g. control data to a local storage area LS, the inarea address of the area LS is set to a section 1-2 of an address register 1 and an LS signal is made to ''1'' at the same time. Thus, ''1111'' generated from the 2nd constant generating circuit 13 is set to a head section 18-0 of an address register 18 via an AND circuit 16 and an OR circuit 17, and the address in the local storage area set to the section 1-2 is set to a lower section 18-1. Thus, data, e.g. control data for local storage area set stored in the address of the 1st and 2nd buffer memories 4, 5 is set. Then, the same data are set to the local storage area LS.
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CONSTITUTION:In writing in, e.g. control data to a local storage area LS, the inarea address of the area LS is set to a section 1-2 of an address register 1 and an LS signal is made to ''1'' at the same time. Thus, ''1111'' generated from the 2nd constant generating circuit 13 is set to a head section 18-0 of an address register 18 via an AND circuit 16 and an OR circuit 17, and the address in the local storage area set to the section 1-2 is set to a lower section 18-1. Thus, data, e.g. control data for local storage area set stored in the address of the 1st and 2nd buffer memories 4, 5 is set. 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CONSTITUTION:In writing in, e.g. control data to a local storage area LS, the inarea address of the area LS is set to a section 1-2 of an address register 1 and an LS signal is made to ''1'' at the same time. Thus, ''1111'' generated from the 2nd constant generating circuit 13 is set to a head section 18-0 of an address register 18 via an AND circuit 16 and an OR circuit 17, and the address in the local storage area set to the section 1-2 is set to a lower section 18-1. Thus, data, e.g. control data for local storage area set stored in the address of the 1st and 2nd buffer memories 4, 5 is set. Then, the same data are set to the local storage area LS.</abstract><oa>free_for_read</oa></addata></record>
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	JPS5935113B
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