PLATING METHOD
PURPOSE:To subject only the inner wall of a hole in a copper-lined laminated board to electroless plating by leaving catalyst nuclei only on the inner wall and carrying out plating under specified conditions using a specified electroless Ni plating bath. CONSTITUTION:Catalyst nuclei are stuck to the...
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creator | SHIRAYOSHI TATSUZOU ITOU YASUNORI OOTA HIDEO TAKAGI FUSAO |
description | PURPOSE:To subject only the inner wall of a hole in a copper-lined laminated board to electroless plating by leaving catalyst nuclei only on the inner wall and carrying out plating under specified conditions using a specified electroless Ni plating bath. CONSTITUTION:Catalyst nuclei are stuck to the whole surface of a copper-lined laminated board including the inner wall of a hole pierced in the board, and the catalyst nuclei on the surface of the copper foil of the board are removed by planing to leave the catalyst nuclei only on the inner wall of the hole. The board is then immersed in an electroless Ni plating bath of 2.1-2.6pH at 65- 75 deg.C. The plating bath contains 3-9g/l (expressed in terms of Ni) Ni salt, 15- 30g/l sodium citrate and 30-50g/l sodium hypophosphite. Only the inner wall of the hole in the copper lined laminated board is subjected to electroless Ni plating. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS59185771A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS59185771A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS59185771A3</originalsourceid><addsrcrecordid>eNrjZOAL8HEM8fRzV_B1DfHwd-FhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcGmloYWpubmho7GxKgBANFsHVM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PLATING METHOD</title><source>esp@cenet</source><creator>SHIRAYOSHI TATSUZOU ; ITOU YASUNORI ; OOTA HIDEO ; TAKAGI FUSAO</creator><creatorcontrib>SHIRAYOSHI TATSUZOU ; ITOU YASUNORI ; OOTA HIDEO ; TAKAGI FUSAO</creatorcontrib><description>PURPOSE:To subject only the inner wall of a hole in a copper-lined laminated board to electroless plating by leaving catalyst nuclei only on the inner wall and carrying out plating under specified conditions using a specified electroless Ni plating bath. CONSTITUTION:Catalyst nuclei are stuck to the whole surface of a copper-lined laminated board including the inner wall of a hole pierced in the board, and the catalyst nuclei on the surface of the copper foil of the board are removed by planing to leave the catalyst nuclei only on the inner wall of the hole. The board is then immersed in an electroless Ni plating bath of 2.1-2.6pH at 65- 75 deg.C. The plating bath contains 3-9g/l (expressed in terms of Ni) Ni salt, 15- 30g/l sodium citrate and 30-50g/l sodium hypophosphite. Only the inner wall of the hole in the copper lined laminated board is subjected to electroless Ni plating.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; METALLURGY ; PRINTED CIRCUITS ; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><creationdate>1984</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19841022&DB=EPODOC&CC=JP&NR=S59185771A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19841022&DB=EPODOC&CC=JP&NR=S59185771A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIRAYOSHI TATSUZOU</creatorcontrib><creatorcontrib>ITOU YASUNORI</creatorcontrib><creatorcontrib>OOTA HIDEO</creatorcontrib><creatorcontrib>TAKAGI FUSAO</creatorcontrib><title>PLATING METHOD</title><description>PURPOSE:To subject only the inner wall of a hole in a copper-lined laminated board to electroless plating by leaving catalyst nuclei only on the inner wall and carrying out plating under specified conditions using a specified electroless Ni plating bath. CONSTITUTION:Catalyst nuclei are stuck to the whole surface of a copper-lined laminated board including the inner wall of a hole pierced in the board, and the catalyst nuclei on the surface of the copper foil of the board are removed by planing to leave the catalyst nuclei only on the inner wall of the hole. The board is then immersed in an electroless Ni plating bath of 2.1-2.6pH at 65- 75 deg.C. The plating bath contains 3-9g/l (expressed in terms of Ni) Ni salt, 15- 30g/l sodium citrate and 30-50g/l sodium hypophosphite. Only the inner wall of the hole in the copper lined laminated board is subjected to electroless Ni plating.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>CHEMICAL SURFACE TREATMENT</subject><subject>CHEMISTRY</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING MATERIAL WITH METALLIC MATERIAL</subject><subject>COATING METALLIC MATERIAL</subject><subject>DIFFUSION TREATMENT OF METALLIC MATERIAL</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>METALLURGY</subject><subject>PRINTED CIRCUITS</subject><subject>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1984</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOAL8HEM8fRzV_B1DfHwd-FhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcGmloYWpubmho7GxKgBANFsHVM</recordid><startdate>19841022</startdate><enddate>19841022</enddate><creator>SHIRAYOSHI TATSUZOU</creator><creator>ITOU YASUNORI</creator><creator>OOTA HIDEO</creator><creator>TAKAGI FUSAO</creator><scope>EVB</scope></search><sort><creationdate>19841022</creationdate><title>PLATING METHOD</title><author>SHIRAYOSHI TATSUZOU ; ITOU YASUNORI ; OOTA HIDEO ; TAKAGI FUSAO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS59185771A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1984</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>CHEMICAL SURFACE TREATMENT</topic><topic>CHEMISTRY</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING MATERIAL WITH METALLIC MATERIAL</topic><topic>COATING METALLIC MATERIAL</topic><topic>DIFFUSION TREATMENT OF METALLIC MATERIAL</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>METALLURGY</topic><topic>PRINTED CIRCUITS</topic><topic>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIRAYOSHI TATSUZOU</creatorcontrib><creatorcontrib>ITOU YASUNORI</creatorcontrib><creatorcontrib>OOTA HIDEO</creatorcontrib><creatorcontrib>TAKAGI FUSAO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIRAYOSHI TATSUZOU</au><au>ITOU YASUNORI</au><au>OOTA HIDEO</au><au>TAKAGI FUSAO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PLATING METHOD</title><date>1984-10-22</date><risdate>1984</risdate><abstract>PURPOSE:To subject only the inner wall of a hole in a copper-lined laminated board to electroless plating by leaving catalyst nuclei only on the inner wall and carrying out plating under specified conditions using a specified electroless Ni plating bath. CONSTITUTION:Catalyst nuclei are stuck to the whole surface of a copper-lined laminated board including the inner wall of a hole pierced in the board, and the catalyst nuclei on the surface of the copper foil of the board are removed by planing to leave the catalyst nuclei only on the inner wall of the hole. The board is then immersed in an electroless Ni plating bath of 2.1-2.6pH at 65- 75 deg.C. The plating bath contains 3-9g/l (expressed in terms of Ni) Ni salt, 15- 30g/l sodium citrate and 30-50g/l sodium hypophosphite. Only the inner wall of the hole in the copper lined laminated board is subjected to electroless Ni plating.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS METALLURGY PRINTED CIRCUITS SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION |
title | PLATING METHOD |
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