RECORDING DEVICE FOR INSTRUCTION RUN ADDRESS
PURPOSE:To separate a program into a part which is already run and a part which is not run by recording automatically a run identification flag corresponding to an instruction address of a program to be recorded without deteriorating processing function. CONSTITUTION:Write data to an instruction run...
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creator | MOMOSE TSUGUO KUWABARA TOSHINORI HIBI KAZUO |
description | PURPOSE:To separate a program into a part which is already run and a part which is not run by recording automatically a run identification flag corresponding to an instruction address of a program to be recorded without deteriorating processing function. CONSTITUTION:Write data to an instruction run address recording device 100 is determined according to whether an instruction being executed by an information processor 1 is a branch instruction or not and by a branch success signal sent out through a bus 106. This data is sent out to an instruction run address storage part 8. Further, every time one instruction is executed by the processor 1, a low-order instruction address is selected by a record identification register 6 and comparing circuits 5a-5h, and an identification flag is stored in a two-bit storage area in the storage part 8 which is selected by said address. The contents of the storage part 8 are read out to a main storage device 2 by a bus 109 through the processor 1 on the basis of the flag, and the program is separated into a part which is already run and the part which is not run almost without deterioration in performance. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS59161751A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS59161751A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS59161751A3</originalsourceid><addsrcrecordid>eNrjZNAJcnX2D3Lx9HNXcHEN83R2VXDzD1Lw9AsOCQp1DvH091MICvVTcHRxCXINDuZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcGmloZmhuamho7GxKgBAKwDJaI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>RECORDING DEVICE FOR INSTRUCTION RUN ADDRESS</title><source>esp@cenet</source><creator>MOMOSE TSUGUO ; KUWABARA TOSHINORI ; HIBI KAZUO</creator><creatorcontrib>MOMOSE TSUGUO ; KUWABARA TOSHINORI ; HIBI KAZUO</creatorcontrib><description>PURPOSE:To separate a program into a part which is already run and a part which is not run by recording automatically a run identification flag corresponding to an instruction address of a program to be recorded without deteriorating processing function. CONSTITUTION:Write data to an instruction run address recording device 100 is determined according to whether an instruction being executed by an information processor 1 is a branch instruction or not and by a branch success signal sent out through a bus 106. This data is sent out to an instruction run address storage part 8. Further, every time one instruction is executed by the processor 1, a low-order instruction address is selected by a record identification register 6 and comparing circuits 5a-5h, and an identification flag is stored in a two-bit storage area in the storage part 8 which is selected by said address. The contents of the storage part 8 are read out to a main storage device 2 by a bus 109 through the processor 1 on the basis of the flag, and the program is separated into a part which is already run and the part which is not run almost without deterioration in performance.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1984</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19840912&DB=EPODOC&CC=JP&NR=S59161751A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19840912&DB=EPODOC&CC=JP&NR=S59161751A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MOMOSE TSUGUO</creatorcontrib><creatorcontrib>KUWABARA TOSHINORI</creatorcontrib><creatorcontrib>HIBI KAZUO</creatorcontrib><title>RECORDING DEVICE FOR INSTRUCTION RUN ADDRESS</title><description>PURPOSE:To separate a program into a part which is already run and a part which is not run by recording automatically a run identification flag corresponding to an instruction address of a program to be recorded without deteriorating processing function. CONSTITUTION:Write data to an instruction run address recording device 100 is determined according to whether an instruction being executed by an information processor 1 is a branch instruction or not and by a branch success signal sent out through a bus 106. This data is sent out to an instruction run address storage part 8. Further, every time one instruction is executed by the processor 1, a low-order instruction address is selected by a record identification register 6 and comparing circuits 5a-5h, and an identification flag is stored in a two-bit storage area in the storage part 8 which is selected by said address. The contents of the storage part 8 are read out to a main storage device 2 by a bus 109 through the processor 1 on the basis of the flag, and the program is separated into a part which is already run and the part which is not run almost without deterioration in performance.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1984</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAJcnX2D3Lx9HNXcHEN83R2VXDzD1Lw9AsOCQp1DvH091MICvVTcHRxCXINDuZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcGmloZmhuamho7GxKgBAKwDJaI</recordid><startdate>19840912</startdate><enddate>19840912</enddate><creator>MOMOSE TSUGUO</creator><creator>KUWABARA TOSHINORI</creator><creator>HIBI KAZUO</creator><scope>EVB</scope></search><sort><creationdate>19840912</creationdate><title>RECORDING DEVICE FOR INSTRUCTION RUN ADDRESS</title><author>MOMOSE TSUGUO ; KUWABARA TOSHINORI ; HIBI KAZUO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS59161751A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1984</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MOMOSE TSUGUO</creatorcontrib><creatorcontrib>KUWABARA TOSHINORI</creatorcontrib><creatorcontrib>HIBI KAZUO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MOMOSE TSUGUO</au><au>KUWABARA TOSHINORI</au><au>HIBI KAZUO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>RECORDING DEVICE FOR INSTRUCTION RUN ADDRESS</title><date>1984-09-12</date><risdate>1984</risdate><abstract>PURPOSE:To separate a program into a part which is already run and a part which is not run by recording automatically a run identification flag corresponding to an instruction address of a program to be recorded without deteriorating processing function. CONSTITUTION:Write data to an instruction run address recording device 100 is determined according to whether an instruction being executed by an information processor 1 is a branch instruction or not and by a branch success signal sent out through a bus 106. This data is sent out to an instruction run address storage part 8. Further, every time one instruction is executed by the processor 1, a low-order instruction address is selected by a record identification register 6 and comparing circuits 5a-5h, and an identification flag is stored in a two-bit storage area in the storage part 8 which is selected by said address. The contents of the storage part 8 are read out to a main storage device 2 by a bus 109 through the processor 1 on the basis of the flag, and the program is separated into a part which is already run and the part which is not run almost without deterioration in performance.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | RECORDING DEVICE FOR INSTRUCTION RUN ADDRESS |
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