SYSTEM FOR PREVENTING MALFUNCTION IN CPU

PURPOSE:To prevent surely the malfunction due to runaway or the like of a CPU by providing a retriggerable one-shot multivibrator circuit and resetting the CPU by the interruption of one-shot multivibrator output. CONSTITUTION:When a CPU1 performs normal processing, a clock pulse is transmitted from...

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Hauptverfasser: MASHIBA MINORU, IKEDA YOSHIHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To prevent surely the malfunction due to runaway or the like of a CPU by providing a retriggerable one-shot multivibrator circuit and resetting the CPU by the interruption of one-shot multivibrator output. CONSTITUTION:When a CPU1 performs normal processing, a clock pulse is transmitted from an output terminal R at each execution of one loop. When the operation of the CPU1 is failed and the clock pulse is stopped, an output Q of the one-shot multibirator circuit 3 goes to L level. This output Q becomes the 1st input to an AND circuit 5 via an inverter 4, triggers a one-shot multivibrator circuit 6 by its trailing edge and an output of H level is used as the 2nd input to the circuit 5. An output of L level is obtained from the circuit 5 with the 1st and 2nd inputs both going to H, the output is inputted to an RES' terminal of the CPU1 via the circuit 7 or the like and CPU1 is reset. Thus, the program is executed from the beginning thereby preventing the malfunction.