TRANSISTOR
PURPOSE:To have the resistor, to be connected to the emitter or the base of a transistor, built-in in the same chip by a method wherein an island type electrode isolated from the surrounding parts is provided on the emitter or the base electrode of the transistor of planar structure, and a lead wire...
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creator | ITOU SHINICHI MATSUO MUTSUMI SEKIYA TSUNETO |
description | PURPOSE:To have the resistor, to be connected to the emitter or the base of a transistor, built-in in the same chip by a method wherein an island type electrode isolated from the surrounding parts is provided on the emitter or the base electrode of the transistor of planar structure, and a lead wire is connected to the island type electrode. CONSTITUTION:A transistor is formed by diffusing a P-base layer 3 from the surface of an N type silicon substrate 2, and a planar structure which was formed by diffusing an emitter layer 4 from the surface is provided in the transistor. In the region where the oxide film 5 is coated on the surface, an emitter electrode 6 consisting of an aluminum vapor-deposited film, for example, and a base electrode 7 are provided. An N layer 8 is provided on the lower side of a substrate 1 for connection with a collector electrode which is not appearing in the diagram. A groove 9, whereon electrode metal was removed and an island- formed electrode 61 was left over by performing an optical etching method, is formed on the emitter electrode 6. An emitter lead wire 10 is adhered to an island-formed electrode 61. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS5887867A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS5887867A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS5887867A3</originalsourceid><addsrcrecordid>eNrjZOAKCXL0C_YMDvEP4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BwaYWFuYWZuaOxkQoAQBEtBwi</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TRANSISTOR</title><source>esp@cenet</source><creator>ITOU SHINICHI ; MATSUO MUTSUMI ; SEKIYA TSUNETO</creator><creatorcontrib>ITOU SHINICHI ; MATSUO MUTSUMI ; SEKIYA TSUNETO</creatorcontrib><description>PURPOSE:To have the resistor, to be connected to the emitter or the base of a transistor, built-in in the same chip by a method wherein an island type electrode isolated from the surrounding parts is provided on the emitter or the base electrode of the transistor of planar structure, and a lead wire is connected to the island type electrode. CONSTITUTION:A transistor is formed by diffusing a P-base layer 3 from the surface of an N type silicon substrate 2, and a planar structure which was formed by diffusing an emitter layer 4 from the surface is provided in the transistor. In the region where the oxide film 5 is coated on the surface, an emitter electrode 6 consisting of an aluminum vapor-deposited film, for example, and a base electrode 7 are provided. An N<+> layer 8 is provided on the lower side of a substrate 1 for connection with a collector electrode which is not appearing in the diagram. A groove 9, whereon electrode metal was removed and an island- formed electrode 61 was left over by performing an optical etching method, is formed on the emitter electrode 6. An emitter lead wire 10 is adhered to an island-formed electrode 61.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19830525&DB=EPODOC&CC=JP&NR=S5887867A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19830525&DB=EPODOC&CC=JP&NR=S5887867A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ITOU SHINICHI</creatorcontrib><creatorcontrib>MATSUO MUTSUMI</creatorcontrib><creatorcontrib>SEKIYA TSUNETO</creatorcontrib><title>TRANSISTOR</title><description>PURPOSE:To have the resistor, to be connected to the emitter or the base of a transistor, built-in in the same chip by a method wherein an island type electrode isolated from the surrounding parts is provided on the emitter or the base electrode of the transistor of planar structure, and a lead wire is connected to the island type electrode. CONSTITUTION:A transistor is formed by diffusing a P-base layer 3 from the surface of an N type silicon substrate 2, and a planar structure which was formed by diffusing an emitter layer 4 from the surface is provided in the transistor. In the region where the oxide film 5 is coated on the surface, an emitter electrode 6 consisting of an aluminum vapor-deposited film, for example, and a base electrode 7 are provided. An N<+> layer 8 is provided on the lower side of a substrate 1 for connection with a collector electrode which is not appearing in the diagram. A groove 9, whereon electrode metal was removed and an island- formed electrode 61 was left over by performing an optical etching method, is formed on the emitter electrode 6. An emitter lead wire 10 is adhered to an island-formed electrode 61.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOAKCXL0C_YMDvEP4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BwaYWFuYWZuaOxkQoAQBEtBwi</recordid><startdate>19830525</startdate><enddate>19830525</enddate><creator>ITOU SHINICHI</creator><creator>MATSUO MUTSUMI</creator><creator>SEKIYA TSUNETO</creator><scope>EVB</scope></search><sort><creationdate>19830525</creationdate><title>TRANSISTOR</title><author>ITOU SHINICHI ; MATSUO MUTSUMI ; SEKIYA TSUNETO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS5887867A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ITOU SHINICHI</creatorcontrib><creatorcontrib>MATSUO MUTSUMI</creatorcontrib><creatorcontrib>SEKIYA TSUNETO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ITOU SHINICHI</au><au>MATSUO MUTSUMI</au><au>SEKIYA TSUNETO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TRANSISTOR</title><date>1983-05-25</date><risdate>1983</risdate><abstract>PURPOSE:To have the resistor, to be connected to the emitter or the base of a transistor, built-in in the same chip by a method wherein an island type electrode isolated from the surrounding parts is provided on the emitter or the base electrode of the transistor of planar structure, and a lead wire is connected to the island type electrode. CONSTITUTION:A transistor is formed by diffusing a P-base layer 3 from the surface of an N type silicon substrate 2, and a planar structure which was formed by diffusing an emitter layer 4 from the surface is provided in the transistor. In the region where the oxide film 5 is coated on the surface, an emitter electrode 6 consisting of an aluminum vapor-deposited film, for example, and a base electrode 7 are provided. An N<+> layer 8 is provided on the lower side of a substrate 1 for connection with a collector electrode which is not appearing in the diagram. A groove 9, whereon electrode metal was removed and an island- formed electrode 61 was left over by performing an optical etching method, is formed on the emitter electrode 6. An emitter lead wire 10 is adhered to an island-formed electrode 61.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | TRANSISTOR |
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