JPS5827670B

PURPOSE:To reduce an area of one transistor memory cell and also to extend a storage time by arranging a capacity part on the top of a mesa domain through providing a dielectric layer of different kind and a transistor part on the area longitudinal to the mesa domain. CONSTITUTION:An n-layer 2 is fo...

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Bibliographische Detailangaben

1. Verfasser:	TANIGAWA YOSHIKI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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