FREQUENCY DETECTING CIRCUIT

PURPOSE:To reduce the size of a chip, by substituting two flip-flops for the fourth counter in a frequency detecting circuit. CONSTITUTION:Instead of the fourth counter C4, a flip-flop 9 (FF4) and 10 (DF5) for operating the third counter C3 two times and an NOR circuit 11 are provided. When an outpu...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SHIBATA NOBUHO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SHIBATA NOBUHO
description PURPOSE:To reduce the size of a chip, by substituting two flip-flops for the fourth counter in a frequency detecting circuit. CONSTITUTION:Instead of the fourth counter C4, a flip-flop 9 (FF4) and 10 (DF5) for operating the third counter C3 two times and an NOR circuit 11 are provided. When an output Q2 of the counter C2 falls, the FF4 is set and the DF5 is reset. The NOR circuit 11 which is in ''H'' before that time becomes ''L'', and starts the first counting. Subsequently, after a prescribed time, the counting ends, the DF5 becomes ''H'' by an output Q3, and the counter C3 starts the second counting. Subsequently, in the same way, the counting ends, the output of the NOR circuit 11 becomes ''H'', and the counter C3 stops its operation. In this way, the number of internal elements is reduced, and the size of a chip can be made small.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS58173470A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS58173470A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS58173470A3</originalsourceid><addsrcrecordid>eNrjZJB2C3INDHX1c45UcHENcXUO8fRzV3D2DHIO9QzhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBphaG5sYm5gaOxsSoAQBnPyD8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>FREQUENCY DETECTING CIRCUIT</title><source>esp@cenet</source><creator>SHIBATA NOBUHO</creator><creatorcontrib>SHIBATA NOBUHO</creatorcontrib><description>PURPOSE:To reduce the size of a chip, by substituting two flip-flops for the fourth counter in a frequency detecting circuit. CONSTITUTION:Instead of the fourth counter C4, a flip-flop 9 (FF4) and 10 (DF5) for operating the third counter C3 two times and an NOR circuit 11 are provided. When an output Q2 of the counter C2 falls, the FF4 is set and the DF5 is reset. The NOR circuit 11 which is in ''H'' before that time becomes ''L'', and starts the first counting. Subsequently, after a prescribed time, the counting ends, the DF5 becomes ''H'' by an output Q3, and the counter C3 starts the second counting. Subsequently, in the same way, the counting ends, the output of the NOR circuit 11 becomes ''H'', and the counter C3 stops its operation. In this way, the number of internal elements is reduced, and the size of a chip can be made small.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS ; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; GENERATION ; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION,OR SHOCK ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PULSE TECHNIQUE ; TESTING</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19831012&amp;DB=EPODOC&amp;CC=JP&amp;NR=S58173470A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19831012&amp;DB=EPODOC&amp;CC=JP&amp;NR=S58173470A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIBATA NOBUHO</creatorcontrib><title>FREQUENCY DETECTING CIRCUIT</title><description>PURPOSE:To reduce the size of a chip, by substituting two flip-flops for the fourth counter in a frequency detecting circuit. CONSTITUTION:Instead of the fourth counter C4, a flip-flop 9 (FF4) and 10 (DF5) for operating the third counter C3 two times and an NOR circuit 11 are provided. When an output Q2 of the counter C2 falls, the FF4 is set and the DF5 is reset. The NOR circuit 11 which is in ''H'' before that time becomes ''L'', and starts the first counting. Subsequently, after a prescribed time, the counting ends, the DF5 becomes ''H'' by an output Q3, and the counter C3 starts the second counting. Subsequently, in the same way, the counting ends, the output of the NOR circuit 11 becomes ''H'', and the counter C3 stops its operation. In this way, the number of internal elements is reduced, and the size of a chip can be made small.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS</subject><subject>CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>GENERATION</subject><subject>INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION,OR SHOCK</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJB2C3INDHX1c45UcHENcXUO8fRzV3D2DHIO9QzhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBphaG5sYm5gaOxsSoAQBnPyD8</recordid><startdate>19831012</startdate><enddate>19831012</enddate><creator>SHIBATA NOBUHO</creator><scope>EVB</scope></search><sort><creationdate>19831012</creationdate><title>FREQUENCY DETECTING CIRCUIT</title><author>SHIBATA NOBUHO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS58173470A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS</topic><topic>CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>GENERATION</topic><topic>INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION,OR SHOCK</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIBATA NOBUHO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIBATA NOBUHO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FREQUENCY DETECTING CIRCUIT</title><date>1983-10-12</date><risdate>1983</risdate><abstract>PURPOSE:To reduce the size of a chip, by substituting two flip-flops for the fourth counter in a frequency detecting circuit. CONSTITUTION:Instead of the fourth counter C4, a flip-flop 9 (FF4) and 10 (DF5) for operating the third counter C3 two times and an NOR circuit 11 are provided. When an output Q2 of the counter C2 falls, the FF4 is set and the DF5 is reset. The NOR circuit 11 which is in ''H'' before that time becomes ''L'', and starts the first counting. Subsequently, after a prescribed time, the counting ends, the DF5 becomes ''H'' by an output Q3, and the counter C3 starts the second counting. Subsequently, in the same way, the counting ends, the output of the NOR circuit 11 becomes ''H'', and the counter C3 stops its operation. In this way, the number of internal elements is reduced, and the size of a chip can be made small.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPS58173470A
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS
CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
ELECTRICITY
GENERATION
INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION,OR SHOCK
MEASURING MAGNETIC VARIABLES
PHYSICS
PULSE TECHNIQUE
TESTING
title FREQUENCY DETECTING CIRCUIT
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T17%3A30%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SHIBATA%20NOBUHO&rft.date=1983-10-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS58173470A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true