MEMORY SHARING SYSTEM

PURPOSE:To reduce the kind of memory and to set up the capacity of a common area in each local processor, by providing an area commonly used with a master processor, in an exclusive memory for local processors. CONSTITUTION:The master processor has a memory space of 1MB and twenty address lines A19-...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: GOTOU TETSUO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator GOTOU TETSUO
description PURPOSE:To reduce the kind of memory and to set up the capacity of a common area in each local processor, by providing an area commonly used with a master processor, in an exclusive memory for local processors. CONSTITUTION:The master processor has a memory space of 1MB and twenty address lines A19-A0. Since varied in every 16KB, a common memory is addressed by the address lines A19-A14. If a switch SW19 is turned on, an input signal to a gate 102 is turned to ''1'' when the address line A19 is ''1''. When the common area is 16KB, both switches SW1, SW2 are turned on and all the switches SW19-SW14 are available. When the common area is 64KB, both the switches SW1, SW2 are turned off and only the switches SW19-SW16 are available.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS58139261A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS58139261A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS58139261A3</originalsourceid><addsrcrecordid>eNrjZBD1dfX1D4pUCPZwDPL0c1cIjgwOcfXlYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBphaGxpZGZoaOxsSoAQCw7B9k</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MEMORY SHARING SYSTEM</title><source>esp@cenet</source><creator>GOTOU TETSUO</creator><creatorcontrib>GOTOU TETSUO</creatorcontrib><description>PURPOSE:To reduce the kind of memory and to set up the capacity of a common area in each local processor, by providing an area commonly used with a master processor, in an exclusive memory for local processors. CONSTITUTION:The master processor has a memory space of 1MB and twenty address lines A19-A0. Since varied in every 16KB, a common memory is addressed by the address lines A19-A14. If a switch SW19 is turned on, an input signal to a gate 102 is turned to ''1'' when the address line A19 is ''1''. When the common area is 16KB, both switches SW1, SW2 are turned on and all the switches SW19-SW14 are available. When the common area is 64KB, both the switches SW1, SW2 are turned off and only the switches SW19-SW16 are available.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19830818&amp;DB=EPODOC&amp;CC=JP&amp;NR=S58139261A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19830818&amp;DB=EPODOC&amp;CC=JP&amp;NR=S58139261A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GOTOU TETSUO</creatorcontrib><title>MEMORY SHARING SYSTEM</title><description>PURPOSE:To reduce the kind of memory and to set up the capacity of a common area in each local processor, by providing an area commonly used with a master processor, in an exclusive memory for local processors. CONSTITUTION:The master processor has a memory space of 1MB and twenty address lines A19-A0. Since varied in every 16KB, a common memory is addressed by the address lines A19-A14. If a switch SW19 is turned on, an input signal to a gate 102 is turned to ''1'' when the address line A19 is ''1''. When the common area is 16KB, both switches SW1, SW2 are turned on and all the switches SW19-SW14 are available. When the common area is 64KB, both the switches SW1, SW2 are turned off and only the switches SW19-SW16 are available.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBD1dfX1D4pUCPZwDPL0c1cIjgwOcfXlYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBphaGxpZGZoaOxsSoAQCw7B9k</recordid><startdate>19830818</startdate><enddate>19830818</enddate><creator>GOTOU TETSUO</creator><scope>EVB</scope></search><sort><creationdate>19830818</creationdate><title>MEMORY SHARING SYSTEM</title><author>GOTOU TETSUO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS58139261A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>GOTOU TETSUO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GOTOU TETSUO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MEMORY SHARING SYSTEM</title><date>1983-08-18</date><risdate>1983</risdate><abstract>PURPOSE:To reduce the kind of memory and to set up the capacity of a common area in each local processor, by providing an area commonly used with a master processor, in an exclusive memory for local processors. CONSTITUTION:The master processor has a memory space of 1MB and twenty address lines A19-A0. Since varied in every 16KB, a common memory is addressed by the address lines A19-A14. If a switch SW19 is turned on, an input signal to a gate 102 is turned to ''1'' when the address line A19 is ''1''. When the common area is 16KB, both switches SW1, SW2 are turned on and all the switches SW19-SW14 are available. When the common area is 64KB, both the switches SW1, SW2 are turned off and only the switches SW19-SW16 are available.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPS58139261A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title MEMORY SHARING SYSTEM
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T19%3A15%3A00IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GOTOU%20TETSUO&rft.date=1983-08-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS58139261A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true