OUTPUT LIMIT SYSTEM

PURPOSE:To decrease the collector loss of an output transistor (TR) to fluctuation of a load, by limiting the amplitude of an output voltage in response to the change in power supply voltage. CONSTITUTION:When a power supply voltage drops and an input voltage of a comparator A1 attains a reference v...

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description PURPOSE:To decrease the collector loss of an output transistor (TR) to fluctuation of a load, by limiting the amplitude of an output voltage in response to the change in power supply voltage. CONSTITUTION:When a power supply voltage drops and an input voltage of a comparator A1 attains a reference value or below, an output of the comparator A1 turns to negative. Thus, TRsQ4 and Q5 are turned off. The base voltage of TRsQ1 and Q2 is a voltage division of power supply voltage by resistors R3, R4 and R5. Then, the collector voltage of the TRQ1 is the sum of a base voltage, a VBE and a forward voltage of a diode D1. The collector voltage of the TRQ2 is the subtraction of the base voltage of the TRQ2 from the VBE and a forward voltage of a diode D2. Thus, a large current flows to an output stage and a power supply voltage is decreased, then the amplitude of the output voltage at a terminals 2 can be limited automatically.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS5810905A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS5810905A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS5810905A3</originalsourceid><addsrcrecordid>eNrjZBD2Dw0JCA1R8PH09QxRCI4MDnH15WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BwaYWhgaWBqaOxkQoAQBCWR59</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>OUTPUT LIMIT SYSTEM</title><source>esp@cenet</source><creator>KONDOU HIKARI</creator><creatorcontrib>KONDOU HIKARI</creatorcontrib><description>PURPOSE:To decrease the collector loss of an output transistor (TR) to fluctuation of a load, by limiting the amplitude of an output voltage in response to the change in power supply voltage. CONSTITUTION:When a power supply voltage drops and an input voltage of a comparator A1 attains a reference value or below, an output of the comparator A1 turns to negative. Thus, TRsQ4 and Q5 are turned off. The base voltage of TRsQ1 and Q2 is a voltage division of power supply voltage by resistors R3, R4 and R5. Then, the collector voltage of the TRQ1 is the sum of a base voltage, a VBE and a forward voltage of a diode D1. The collector voltage of the TRQ2 is the subtraction of the base voltage of the TRQ2 from the VBE and a forward voltage of a diode D2. Thus, a large current flows to an output stage and a power supply voltage is decreased, then the amplitude of the output voltage at a terminals 2 can be limited automatically.</description><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19830121&amp;DB=EPODOC&amp;CC=JP&amp;NR=S5810905A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19830121&amp;DB=EPODOC&amp;CC=JP&amp;NR=S5810905A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KONDOU HIKARI</creatorcontrib><title>OUTPUT LIMIT SYSTEM</title><description>PURPOSE:To decrease the collector loss of an output transistor (TR) to fluctuation of a load, by limiting the amplitude of an output voltage in response to the change in power supply voltage. CONSTITUTION:When a power supply voltage drops and an input voltage of a comparator A1 attains a reference value or below, an output of the comparator A1 turns to negative. Thus, TRsQ4 and Q5 are turned off. The base voltage of TRsQ1 and Q2 is a voltage division of power supply voltage by resistors R3, R4 and R5. Then, the collector voltage of the TRQ1 is the sum of a base voltage, a VBE and a forward voltage of a diode D1. The collector voltage of the TRQ2 is the subtraction of the base voltage of the TRQ2 from the VBE and a forward voltage of a diode D2. Thus, a large current flows to an output stage and a power supply voltage is decreased, then the amplitude of the output voltage at a terminals 2 can be limited automatically.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBD2Dw0JCA1R8PH09QxRCI4MDnH15WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BwaYWhgaWBqaOxkQoAQBCWR59</recordid><startdate>19830121</startdate><enddate>19830121</enddate><creator>KONDOU HIKARI</creator><scope>EVB</scope></search><sort><creationdate>19830121</creationdate><title>OUTPUT LIMIT SYSTEM</title><author>KONDOU HIKARI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS5810905A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>KONDOU HIKARI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KONDOU HIKARI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>OUTPUT LIMIT SYSTEM</title><date>1983-01-21</date><risdate>1983</risdate><abstract>PURPOSE:To decrease the collector loss of an output transistor (TR) to fluctuation of a load, by limiting the amplitude of an output voltage in response to the change in power supply voltage. CONSTITUTION:When a power supply voltage drops and an input voltage of a comparator A1 attains a reference value or below, an output of the comparator A1 turns to negative. Thus, TRsQ4 and Q5 are turned off. The base voltage of TRsQ1 and Q2 is a voltage division of power supply voltage by resistors R3, R4 and R5. Then, the collector voltage of the TRQ1 is the sum of a base voltage, a VBE and a forward voltage of a diode D1. The collector voltage of the TRQ2 is the subtraction of the base voltage of the TRQ2 from the VBE and a forward voltage of a diode D2. Thus, a large current flows to an output stage and a power supply voltage is decreased, then the amplitude of the output voltage at a terminals 2 can be limited automatically.</abstract><oa>free_for_read</oa></addata></record>
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subjects AMPLIFIERS
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
title OUTPUT LIMIT SYSTEM
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T08%3A40%3A35IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KONDOU%20HIKARI&rft.date=1983-01-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS5810905A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true