INFORMATION TRANSFER CONTROL SYSTEM
PURPOSE:To perform information transfer efficiently by transferring information only when a state changes during information transfer between a time-division switch network and terminal equipment connected to it. CONSTITUTION:Terminal equipment TRM is provided with a control processing circuit part...
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | YAMAMOTO KUNIO NODA HIDENARI OGATA YUUSUKE |
| description | PURPOSE:To perform information transfer efficiently by transferring information only when a state changes during information transfer between a time-division switch network and terminal equipment connected to it. CONSTITUTION:Terminal equipment TRM is provided with a control processing circuit part MPU which performs control over the whole, and an RAM stored with either or both of received information from a time-division switch network TDSW and transmitted information to the network. A counter CNT counts a multiframe synchronizing signal for direct control over the writing and reading of the RAM. This counter CNT counts the multiframe synchronizing signal to send a signal, which facilitates the initialization processing of a direct memory access control circuit DMAC, to the circuit part MPU and another signal, which permits the transfer of information, at different points in time, thus exercising control over information transfer between the time-division switch network and the RAM. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS57109028A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS57109028A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS57109028A3</originalsourceid><addsrcrecordid>eNrjZFD29HPzD_J1DPH091MICXL0C3ZzDVJw9vcLCfL3UQiODA5x9eVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcGm5oYGlgZGFo7GxKgBAI3aI3M</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INFORMATION TRANSFER CONTROL SYSTEM</title><source>esp@cenet</source><creator>YAMAMOTO KUNIO ; NODA HIDENARI ; OGATA YUUSUKE</creator><creatorcontrib>YAMAMOTO KUNIO ; NODA HIDENARI ; OGATA YUUSUKE</creatorcontrib><description>PURPOSE:To perform information transfer efficiently by transferring information only when a state changes during information transfer between a time-division switch network and terminal equipment connected to it. CONSTITUTION:Terminal equipment TRM is provided with a control processing circuit part MPU which performs control over the whole, and an RAM stored with either or both of received information from a time-division switch network TDSW and transmitted information to the network. A counter CNT counts a multiframe synchronizing signal for direct control over the writing and reading of the RAM. This counter CNT counts the multiframe synchronizing signal to send a signal, which facilitates the initialization processing of a direct memory access control circuit DMAC, to the circuit part MPU and another signal, which permits the transfer of information, at different points in time, thus exercising control over information transfer between the time-division switch network and the RAM.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; SELECTING</subject><creationdate>1982</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19820707&DB=EPODOC&CC=JP&NR=S57109028A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19820707&DB=EPODOC&CC=JP&NR=S57109028A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAMAMOTO KUNIO</creatorcontrib><creatorcontrib>NODA HIDENARI</creatorcontrib><creatorcontrib>OGATA YUUSUKE</creatorcontrib><title>INFORMATION TRANSFER CONTROL SYSTEM</title><description>PURPOSE:To perform information transfer efficiently by transferring information only when a state changes during information transfer between a time-division switch network and terminal equipment connected to it. CONSTITUTION:Terminal equipment TRM is provided with a control processing circuit part MPU which performs control over the whole, and an RAM stored with either or both of received information from a time-division switch network TDSW and transmitted information to the network. A counter CNT counts a multiframe synchronizing signal for direct control over the writing and reading of the RAM. This counter CNT counts the multiframe synchronizing signal to send a signal, which facilitates the initialization processing of a direct memory access control circuit DMAC, to the circuit part MPU and another signal, which permits the transfer of information, at different points in time, thus exercising control over information transfer between the time-division switch network and the RAM.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>SELECTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1982</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD29HPzD_J1DPH091MICXL0C3ZzDVJw9vcLCfL3UQiODA5x9eVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcGm5oYGlgZGFo7GxKgBAI3aI3M</recordid><startdate>19820707</startdate><enddate>19820707</enddate><creator>YAMAMOTO KUNIO</creator><creator>NODA HIDENARI</creator><creator>OGATA YUUSUKE</creator><scope>EVB</scope></search><sort><creationdate>19820707</creationdate><title>INFORMATION TRANSFER CONTROL SYSTEM</title><author>YAMAMOTO KUNIO ; NODA HIDENARI ; OGATA YUUSUKE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS57109028A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1982</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>SELECTING</topic><toplevel>online_resources</toplevel><creatorcontrib>YAMAMOTO KUNIO</creatorcontrib><creatorcontrib>NODA HIDENARI</creatorcontrib><creatorcontrib>OGATA YUUSUKE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAMAMOTO KUNIO</au><au>NODA HIDENARI</au><au>OGATA YUUSUKE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INFORMATION TRANSFER CONTROL SYSTEM</title><date>1982-07-07</date><risdate>1982</risdate><abstract>PURPOSE:To perform information transfer efficiently by transferring information only when a state changes during information transfer between a time-division switch network and terminal equipment connected to it. CONSTITUTION:Terminal equipment TRM is provided with a control processing circuit part MPU which performs control over the whole, and an RAM stored with either or both of received information from a time-division switch network TDSW and transmitted information to the network. A counter CNT counts a multiframe synchronizing signal for direct control over the writing and reading of the RAM. This counter CNT counts the multiframe synchronizing signal to send a signal, which facilitates the initialization processing of a direct memory access control circuit DMAC, to the circuit part MPU and another signal, which permits the transfer of information, at different points in time, thus exercising control over information transfer between the time-division switch network and the RAM.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_JPS57109028A |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS SELECTING |
| title | INFORMATION TRANSFER CONTROL SYSTEM |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T13%3A18%3A18IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YAMAMOTO%20KUNIO&rft.date=1982-07-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS57109028A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |