SEMICONDUCTOR STORAGE DEVICE

SEMICONDUCTOR STORAGE DEVICE

PROBLEM TO BE SOLVED: To realize a DRAM(dynamic random access memory) shallowing a substrate voltage in its level at the time of a disturb test mode and a self refresh mode without increasing an area penalty. SOLUTION: This storage device is provided with a switch circuit 40 activating a shallow lev...

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Hauptverfasser: NAKAI JUN, HAYASHIGOE MASANORI
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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creator NAKAI JUN
HAYASHIGOE MASANORI
description PROBLEM TO BE SOLVED: To realize a DRAM(dynamic random access memory) shallowing a substrate voltage in its level at the time of a disturb test mode and a self refresh mode without increasing an area penalty. SOLUTION: This storage device is provided with a switch circuit 40 activating a shallow level detector 38 and inactivating a deep level detector 36 when a disturb test signal TESTUBBS or a self refresh signal/BBU is activated. Thus, the shallow level of substrate voltage VBB equal to the detection level of the shallow level detector 38 is generated by a substrate voltage generation circuit 34 not only at the time of the disturb test mode, but also at the time of the self refresh mode.
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SOLUTION: This storage device is provided with a switch circuit 40 activating a shallow level detector 38 and inactivating a deep level detector 36 when a disturb test signal TESTUBBS or a self refresh signal/BBU is activated. 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subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title SEMICONDUCTOR STORAGE DEVICE
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