METHOD AND DEVICE FOR CALCULATING DELAY OF LOGIC CIRCUIT, AND METHOD FOR CALCULATING DELAY DATA OF DELAY LIBRARY

PROBLEM TO BE SOLVED: To surely obtain delay time by easily and analytically calculating the power supply voltage dependency of delay time of a logic circuit. SOLUTION: In a delay power supply coefficient determining process S03, the drain saturated current Idspi of a p-channel MOS FET is calculated...

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1. Verfasser: HATSUDA TSUGUYASU
Format: Patent
Sprache:eng
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