HIERARCHICAL CACHE SYSTEM

PROBLEM TO BE SOLVED: To control a chache system in such a manner that a multilevel inclusion between caches is fulfilled in a hierarchical cache system which adopts a MESI protocol. SOLUTION: This system is provided with a data writing and state changing circuit 2a which controls the state of data...

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1. Verfasser:	KURATA MAMORU
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	KURATA MAMORU
description	PROBLEM TO BE SOLVED: To control a chache system in such a manner that a multilevel inclusion between caches is fulfilled in a hierarchical cache system which adopts a MESI protocol. SOLUTION: This system is provided with a data writing and state changing circuit 2a which controls the state of data held in a secondary cache 205a with respect to the cache 205a and a snoop result issuing circuit 3a which outputs snoop results to a primary cache side. And, these circuits control in such a manner that the storage contents of the cache 205a always include the storage contents of the 1st cache. Thus, the storage contents of the cache 205a can include the storage contents of the 1st cache only with a control over the cache 205a without changing a controlling method of the 1st cache.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH11232172A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH11232172A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH11232172A3</originalsourceid><addsrcrecordid>eNrjZJD08HQNcgxy9vB0dvRRcHZ09nBVCI4MDnH15WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHoaGRsZGhuZGjsbEqAEACpUgAA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>HIERARCHICAL CACHE SYSTEM</title><source>esp@cenet</source><creator>KURATA MAMORU</creator><creatorcontrib>KURATA MAMORU</creatorcontrib><description>PROBLEM TO BE SOLVED: To control a chache system in such a manner that a multilevel inclusion between caches is fulfilled in a hierarchical cache system which adopts a MESI protocol. SOLUTION: This system is provided with a data writing and state changing circuit 2a which controls the state of data held in a secondary cache 205a with respect to the cache 205a and a snoop result issuing circuit 3a which outputs snoop results to a primary cache side. And, these circuits control in such a manner that the storage contents of the cache 205a always include the storage contents of the 1st cache. Thus, the storage contents of the cache 205a can include the storage contents of the 1st cache only with a control over the cache 205a without changing a controlling method of the 1st cache.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1999</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19990827&DB=EPODOC&CC=JP&NR=H11232172A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19990827&DB=EPODOC&CC=JP&NR=H11232172A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KURATA MAMORU</creatorcontrib><title>HIERARCHICAL CACHE SYSTEM</title><description>PROBLEM TO BE SOLVED: To control a chache system in such a manner that a multilevel inclusion between caches is fulfilled in a hierarchical cache system which adopts a MESI protocol. SOLUTION: This system is provided with a data writing and state changing circuit 2a which controls the state of data held in a secondary cache 205a with respect to the cache 205a and a snoop result issuing circuit 3a which outputs snoop results to a primary cache side. And, these circuits control in such a manner that the storage contents of the cache 205a always include the storage contents of the 1st cache. Thus, the storage contents of the cache 205a can include the storage contents of the 1st cache only with a control over the cache 205a without changing a controlling method of the 1st cache.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1999</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJD08HQNcgxy9vB0dvRRcHZ09nBVCI4MDnH15WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHoaGRsZGhuZGjsbEqAEACpUgAA</recordid><startdate>19990827</startdate><enddate>19990827</enddate><creator>KURATA MAMORU</creator><scope>EVB</scope></search><sort><creationdate>19990827</creationdate><title>HIERARCHICAL CACHE SYSTEM</title><author>KURATA MAMORU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH11232172A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1999</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>KURATA MAMORU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KURATA MAMORU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>HIERARCHICAL CACHE SYSTEM</title><date>1999-08-27</date><risdate>1999</risdate><abstract>PROBLEM TO BE SOLVED: To control a chache system in such a manner that a multilevel inclusion between caches is fulfilled in a hierarchical cache system which adopts a MESI protocol. SOLUTION: This system is provided with a data writing and state changing circuit 2a which controls the state of data held in a secondary cache 205a with respect to the cache 205a and a snoop result issuing circuit 3a which outputs snoop results to a primary cache side. And, these circuits control in such a manner that the storage contents of the cache 205a always include the storage contents of the 1st cache. Thus, the storage contents of the cache 205a can include the storage contents of the 1st cache only with a control over the cache 205a without changing a controlling method of the 1st cache.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	HIERARCHICAL CACHE SYSTEM
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