TWO-LAYER TYPE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
PROBLEM TO BE SOLVED: To obtain a very fine circuit pattern at a high yield by specifying the number and max. length of through-holes piercing a two-layer type printed circuit board and conductive metal layer to reach the surface of an insulation film. SOLUTION: A conductive metal layer 2 is formed...
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creator | TOYAMA SHUNROKU NISHIKAWA TADAHIRO |
description | PROBLEM TO BE SOLVED: To obtain a very fine circuit pattern at a high yield by specifying the number and max. length of through-holes piercing a two-layer type printed circuit board and conductive metal layer to reach the surface of an insulation film. SOLUTION: A conductive metal layer 2 is formed on an insulation film 1 and chemically adsorbed pref. through a water soln. to pin-holes through which the film 1 is exposed, i.e., defects of this metal layer 2 and, if required, to bored throughholes to expose the film 1, and then the electroplating is made to obtain a two-layer type printed board. It is specified that the number and max. length of pin-holes of this board are 10 holes/m or less and 10 microns or less as measured with the transmitted light and steromicroscope. Thus it is possible to produce a fine pattern with through-holes of 80 microns or less pitch at a high yield which was difficult to mass-produce, whereby more highdensity and more high-integration degree electric and electronic apparatus are expectable. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH09289368A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH09289368A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH09289368A3</originalsourceid><addsrcrecordid>eNrjZHANCffX9XGMdA1SCIkMcFUICPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUfB19At1c3QOCQWqcFfwdQ3x8HdRCPFwDXL1d-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAR4GlkYWlsZmFo7GxKgBAJekLHQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TWO-LAYER TYPE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF</title><source>esp@cenet</source><creator>TOYAMA SHUNROKU ; NISHIKAWA TADAHIRO</creator><creatorcontrib>TOYAMA SHUNROKU ; NISHIKAWA TADAHIRO</creatorcontrib><description>PROBLEM TO BE SOLVED: To obtain a very fine circuit pattern at a high yield by specifying the number and max. length of through-holes piercing a two-layer type printed circuit board and conductive metal layer to reach the surface of an insulation film. SOLUTION: A conductive metal layer 2 is formed on an insulation film 1 and chemically adsorbed pref. through a water soln. to pin-holes through which the film 1 is exposed, i.e., defects of this metal layer 2 and, if required, to bored throughholes to expose the film 1, and then the electroplating is made to obtain a two-layer type printed board. It is specified that the number and max. length of pin-holes of this board are 10 holes/m or less and 10 microns or less as measured with the transmitted light and steromicroscope. Thus it is possible to produce a fine pattern with through-holes of 80 microns or less pitch at a high yield which was difficult to mass-produce, whereby more highdensity and more high-integration degree electric and electronic apparatus are expectable.</description><edition>6</edition><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>1997</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19971104&DB=EPODOC&CC=JP&NR=H09289368A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19971104&DB=EPODOC&CC=JP&NR=H09289368A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TOYAMA SHUNROKU</creatorcontrib><creatorcontrib>NISHIKAWA TADAHIRO</creatorcontrib><title>TWO-LAYER TYPE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF</title><description>PROBLEM TO BE SOLVED: To obtain a very fine circuit pattern at a high yield by specifying the number and max. length of through-holes piercing a two-layer type printed circuit board and conductive metal layer to reach the surface of an insulation film. SOLUTION: A conductive metal layer 2 is formed on an insulation film 1 and chemically adsorbed pref. through a water soln. to pin-holes through which the film 1 is exposed, i.e., defects of this metal layer 2 and, if required, to bored throughholes to expose the film 1, and then the electroplating is made to obtain a two-layer type printed board. It is specified that the number and max. length of pin-holes of this board are 10 holes/m or less and 10 microns or less as measured with the transmitted light and steromicroscope. Thus it is possible to produce a fine pattern with through-holes of 80 microns or less pitch at a high yield which was difficult to mass-produce, whereby more highdensity and more high-integration degree electric and electronic apparatus are expectable.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1997</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHANCffX9XGMdA1SCIkMcFUICPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUfB19At1c3QOCQWqcFfwdQ3x8HdRCPFwDXL1d-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAR4GlkYWlsZmFo7GxKgBAJekLHQ</recordid><startdate>19971104</startdate><enddate>19971104</enddate><creator>TOYAMA SHUNROKU</creator><creator>NISHIKAWA TADAHIRO</creator><scope>EVB</scope></search><sort><creationdate>19971104</creationdate><title>TWO-LAYER TYPE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF</title><author>TOYAMA SHUNROKU ; NISHIKAWA TADAHIRO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH09289368A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1997</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>TOYAMA SHUNROKU</creatorcontrib><creatorcontrib>NISHIKAWA TADAHIRO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TOYAMA SHUNROKU</au><au>NISHIKAWA TADAHIRO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TWO-LAYER TYPE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF</title><date>1997-11-04</date><risdate>1997</risdate><abstract>PROBLEM TO BE SOLVED: To obtain a very fine circuit pattern at a high yield by specifying the number and max. length of through-holes piercing a two-layer type printed circuit board and conductive metal layer to reach the surface of an insulation film. SOLUTION: A conductive metal layer 2 is formed on an insulation film 1 and chemically adsorbed pref. through a water soln. to pin-holes through which the film 1 is exposed, i.e., defects of this metal layer 2 and, if required, to bored throughholes to expose the film 1, and then the electroplating is made to obtain a two-layer type printed board. It is specified that the number and max. length of pin-holes of this board are 10 holes/m or less and 10 microns or less as measured with the transmitted light and steromicroscope. Thus it is possible to produce a fine pattern with through-holes of 80 microns or less pitch at a high yield which was difficult to mass-produce, whereby more highdensity and more high-integration degree electric and electronic apparatus are expectable.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
title | TWO-LAYER TYPE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF |
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