TEST PATTERN CREATING DEVICE

PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test patter...

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Hauptverfasser: NISHIGAKI NAOHIKO, HASHIMOTO KEIKO
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creator NISHIGAKI NAOHIKO
HASHIMOTO KEIKO
description PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test pattern expressed by the keyword and a signal value is inputted by a pattern input part 18. A keyword conversion part 14 replaces the keyword in the test pattern by the signal pattern as needed or replaces a specific signal pattern in the test pattern by the keyword. After that, a part which should not be edited in the test pattern is set as a lock region by a lock setting part 22, thus enabling a lock control part 24 to control editing processing so that the contents in the lock region cannot be changed when the test pattern is edited by an editing processing part 28 based on an editing command inputted by an editing input part 26.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH09145799A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH09145799A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH09145799A3</originalsourceid><addsrcrecordid>eNrjZJAJcQ0OUQhwDAlxDfJTcA5ydQzx9HNXcHEN83R25WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHgaWhiam5paWjsbEqAEAeCIhGA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TEST PATTERN CREATING DEVICE</title><source>esp@cenet</source><creator>NISHIGAKI NAOHIKO ; HASHIMOTO KEIKO</creator><creatorcontrib>NISHIGAKI NAOHIKO ; HASHIMOTO KEIKO</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test pattern expressed by the keyword and a signal value is inputted by a pattern input part 18. A keyword conversion part 14 replaces the keyword in the test pattern by the signal pattern as needed or replaces a specific signal pattern in the test pattern by the keyword. After that, a part which should not be edited in the test pattern is set as a lock region by a lock setting part 22, thus enabling a lock control part 24 to control editing processing so that the contents in the lock region cannot be changed when the test pattern is edited by an editing processing part 28 based on an editing command inputted by an editing input part 26.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>1997</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19970606&amp;DB=EPODOC&amp;CC=JP&amp;NR=H09145799A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19970606&amp;DB=EPODOC&amp;CC=JP&amp;NR=H09145799A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NISHIGAKI NAOHIKO</creatorcontrib><creatorcontrib>HASHIMOTO KEIKO</creatorcontrib><title>TEST PATTERN CREATING DEVICE</title><description>PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test pattern expressed by the keyword and a signal value is inputted by a pattern input part 18. A keyword conversion part 14 replaces the keyword in the test pattern by the signal pattern as needed or replaces a specific signal pattern in the test pattern by the keyword. After that, a part which should not be edited in the test pattern is set as a lock region by a lock setting part 22, thus enabling a lock control part 24 to control editing processing so that the contents in the lock region cannot be changed when the test pattern is edited by an editing processing part 28 based on an editing command inputted by an editing input part 26.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1997</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAJcQ0OUQhwDAlxDfJTcA5ydQzx9HNXcHEN83R25WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHgaWhiam5paWjsbEqAEAeCIhGA</recordid><startdate>19970606</startdate><enddate>19970606</enddate><creator>NISHIGAKI NAOHIKO</creator><creator>HASHIMOTO KEIKO</creator><scope>EVB</scope></search><sort><creationdate>19970606</creationdate><title>TEST PATTERN CREATING DEVICE</title><author>NISHIGAKI NAOHIKO ; HASHIMOTO KEIKO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH09145799A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1997</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>NISHIGAKI NAOHIKO</creatorcontrib><creatorcontrib>HASHIMOTO KEIKO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NISHIGAKI NAOHIKO</au><au>HASHIMOTO KEIKO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TEST PATTERN CREATING DEVICE</title><date>1997-06-06</date><risdate>1997</risdate><abstract>PROBLEM TO BE SOLVED: To provide a universal test pattern creating device for efficiently creating the test pattern of an integrated circuit without any errors. SOLUTION: A keyword is registered in a keyword table 12 corresponding to a signal pattern by a keyword definition part 16 and a test pattern expressed by the keyword and a signal value is inputted by a pattern input part 18. A keyword conversion part 14 replaces the keyword in the test pattern by the signal pattern as needed or replaces a specific signal pattern in the test pattern by the keyword. After that, a part which should not be edited in the test pattern is set as a lock region by a lock setting part 22, thus enabling a lock control part 24 to control editing processing so that the contents in the lock region cannot be changed when the test pattern is edited by an editing processing part 28 based on an editing command inputted by an editing input part 26.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title TEST PATTERN CREATING DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T12%3A22%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NISHIGAKI%20NAOHIKO&rft.date=1997-06-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH09145799A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true