SEMICONDUCTOR STORAGE DEVICE

PURPOSE: To reduce power consumption required for serially accessing a memory cell array by converting a first address sequence generated by the use of an address sequence generation circuit to a specified second address list using a code conversion circuit. CONSTITUTION: A first address sequence wh...

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1. Verfasser: OUCHI KAZUNORI
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description PURPOSE: To reduce power consumption required for serially accessing a memory cell array by converting a first address sequence generated by the use of an address sequence generation circuit to a specified second address list using a code conversion circuit. CONSTITUTION: A first address sequence which is supplied from the counter 14 to serially access the memory array 2 is converted into the code of the second address sequence in which the hamming distance of the neighboring address is 1 using the code conversion circuit 16, and the columns of the memory array 1 are accessed through the column decoder 8. By this conversion process, only one bit changes its state when an address composed of two or more bits is switched, and the power consumption required for address switching is minimized. In addition, this method can be similarly applied to the row direction or both the row and the column directions, too.
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CONSTITUTION: A first address sequence which is supplied from the counter 14 to serially access the memory array 2 is converted into the code of the second address sequence in which the hamming distance of the neighboring address is 1 using the code conversion circuit 16, and the columns of the memory array 1 are accessed through the column decoder 8. By this conversion process, only one bit changes its state when an address composed of two or more bits is switched, and the power consumption required for address switching is minimized. In addition, this method can be similarly applied to the row direction or both the row and the column directions, too.</description><edition>6</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>1996</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19960308&amp;DB=EPODOC&amp;CC=JP&amp;NR=H0863969A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19960308&amp;DB=EPODOC&amp;CC=JP&amp;NR=H0863969A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OUCHI KAZUNORI</creatorcontrib><title>SEMICONDUCTOR STORAGE DEVICE</title><description>PURPOSE: To reduce power consumption required for serially accessing a memory cell array by converting a first address sequence generated by the use of an address sequence generation circuit to a specified second address list using a code conversion circuit. CONSTITUTION: A first address sequence which is supplied from the counter 14 to serially access the memory array 2 is converted into the code of the second address sequence in which the hamming distance of the neighboring address is 1 using the code conversion circuit 16, and the columns of the memory array 1 are accessed through the column decoder 8. By this conversion process, only one bit changes its state when an address composed of two or more bits is switched, and the power consumption required for address switching is minimized. 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CONSTITUTION: A first address sequence which is supplied from the counter 14 to serially access the memory array 2 is converted into the code of the second address sequence in which the hamming distance of the neighboring address is 1 using the code conversion circuit 16, and the columns of the memory array 1 are accessed through the column decoder 8. By this conversion process, only one bit changes its state when an address composed of two or more bits is switched, and the power consumption required for address switching is minimized. In addition, this method can be similarly applied to the row direction or both the row and the column directions, too.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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STATIC STORES
title SEMICONDUCTOR STORAGE DEVICE
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