DEVICE AND METHOD FOR PROGRAM DEBUGGING

PURPOSE: To provide a device and a method for program debugging capable of executing debug by specifying clearly a state when a CPU in which an error has occurred stops and a program stopping position when an error has occurred in each CPU. CONSTITUTION: This device comprises an exceptional stack fr...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SUZUKI YASUTAKA, OGAWA EIJI, NORO JUN
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SUZUKI YASUTAKA
OGAWA EIJI
NORO JUN
description PURPOSE: To provide a device and a method for program debugging capable of executing debug by specifying clearly a state when a CPU in which an error has occurred stops and a program stopping position when an error has occurred in each CPU. CONSTITUTION: This device comprises an exceptional stack frame generating means 11 which generates a stack frame to perform the exceptional processing of an error, an exceptional stack frame judging means 131 which judges the format of a generated exceptional stack frame, an exceptional stack data transfer means 151 which transfers exceptional stack data to a memory area corresponding to the format in the common memory area of each CPU based on a judged format, an error flag judging means 132 which judges the error flag of the CPU, an error information transfer means 152 which transfers error information to a specific memory area in the common memory area based on the above judgement, and an error information processing means 17 which displays transferred error information and executes the debug.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH08314753A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH08314753A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH08314753A3</originalsourceid><addsrcrecordid>eNrjZFB3cQ3zdHZVcPRzUfB1DfHwd1Fw8w9SCAjydw9y9FVwcXUKdXf39HPnYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgEeBhbGhibmpsaOxsSoAQDHWyO9</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DEVICE AND METHOD FOR PROGRAM DEBUGGING</title><source>esp@cenet</source><creator>SUZUKI YASUTAKA ; OGAWA EIJI ; NORO JUN</creator><creatorcontrib>SUZUKI YASUTAKA ; OGAWA EIJI ; NORO JUN</creatorcontrib><description>PURPOSE: To provide a device and a method for program debugging capable of executing debug by specifying clearly a state when a CPU in which an error has occurred stops and a program stopping position when an error has occurred in each CPU. CONSTITUTION: This device comprises an exceptional stack frame generating means 11 which generates a stack frame to perform the exceptional processing of an error, an exceptional stack frame judging means 131 which judges the format of a generated exceptional stack frame, an exceptional stack data transfer means 151 which transfers exceptional stack data to a memory area corresponding to the format in the common memory area of each CPU based on a judged format, an error flag judging means 132 which judges the error flag of the CPU, an error information transfer means 152 which transfers error information to a specific memory area in the common memory area based on the above judgement, and an error information processing means 17 which displays transferred error information and executes the debug.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1996</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19961129&amp;DB=EPODOC&amp;CC=JP&amp;NR=H08314753A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19961129&amp;DB=EPODOC&amp;CC=JP&amp;NR=H08314753A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SUZUKI YASUTAKA</creatorcontrib><creatorcontrib>OGAWA EIJI</creatorcontrib><creatorcontrib>NORO JUN</creatorcontrib><title>DEVICE AND METHOD FOR PROGRAM DEBUGGING</title><description>PURPOSE: To provide a device and a method for program debugging capable of executing debug by specifying clearly a state when a CPU in which an error has occurred stops and a program stopping position when an error has occurred in each CPU. CONSTITUTION: This device comprises an exceptional stack frame generating means 11 which generates a stack frame to perform the exceptional processing of an error, an exceptional stack frame judging means 131 which judges the format of a generated exceptional stack frame, an exceptional stack data transfer means 151 which transfers exceptional stack data to a memory area corresponding to the format in the common memory area of each CPU based on a judged format, an error flag judging means 132 which judges the error flag of the CPU, an error information transfer means 152 which transfers error information to a specific memory area in the common memory area based on the above judgement, and an error information processing means 17 which displays transferred error information and executes the debug.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1996</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB3cQ3zdHZVcPRzUfB1DfHwd1Fw8w9SCAjydw9y9FVwcXUKdXf39HPnYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgEeBhbGhibmpsaOxsSoAQDHWyO9</recordid><startdate>19961129</startdate><enddate>19961129</enddate><creator>SUZUKI YASUTAKA</creator><creator>OGAWA EIJI</creator><creator>NORO JUN</creator><scope>EVB</scope></search><sort><creationdate>19961129</creationdate><title>DEVICE AND METHOD FOR PROGRAM DEBUGGING</title><author>SUZUKI YASUTAKA ; OGAWA EIJI ; NORO JUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH08314753A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1996</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SUZUKI YASUTAKA</creatorcontrib><creatorcontrib>OGAWA EIJI</creatorcontrib><creatorcontrib>NORO JUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUZUKI YASUTAKA</au><au>OGAWA EIJI</au><au>NORO JUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DEVICE AND METHOD FOR PROGRAM DEBUGGING</title><date>1996-11-29</date><risdate>1996</risdate><abstract>PURPOSE: To provide a device and a method for program debugging capable of executing debug by specifying clearly a state when a CPU in which an error has occurred stops and a program stopping position when an error has occurred in each CPU. CONSTITUTION: This device comprises an exceptional stack frame generating means 11 which generates a stack frame to perform the exceptional processing of an error, an exceptional stack frame judging means 131 which judges the format of a generated exceptional stack frame, an exceptional stack data transfer means 151 which transfers exceptional stack data to a memory area corresponding to the format in the common memory area of each CPU based on a judged format, an error flag judging means 132 which judges the error flag of the CPU, an error information transfer means 152 which transfers error information to a specific memory area in the common memory area based on the above judgement, and an error information processing means 17 which displays transferred error information and executes the debug.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JPH08314753A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title DEVICE AND METHOD FOR PROGRAM DEBUGGING
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-12T22%3A15%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SUZUKI%20YASUTAKA&rft.date=1996-11-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH08314753A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true